Skip to content

Commit

Permalink
cxl: Machine level control on whether CXL support is enabled
Browse files Browse the repository at this point in the history
There are going to be some potential overheads to CXL enablement,
for example the host bridge region reserved in memory maps.
Add a machine level control so that CXL is disabled by default.

Signed-off-by: Jonathan Cameron <[email protected]>
Reviewed-by: Alex Bennée <[email protected]>
Message-Id: <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
  • Loading branch information
jic23 authored and mstsirkin committed May 13, 2022
1 parent 9dccb12 commit abb3009
Show file tree
Hide file tree
Showing 4 changed files with 35 additions and 0 deletions.
28 changes: 28 additions & 0 deletions hw/core/machine.c
Original file line number Diff line number Diff line change
Expand Up @@ -33,6 +33,7 @@
#include "sysemu/qtest.h"
#include "hw/pci/pci.h"
#include "hw/mem/nvdimm.h"
#include "hw/cxl/cxl.h"
#include "migration/global_state.h"
#include "migration/vmstate.h"
#include "exec/confidential-guest-support.h"
Expand Down Expand Up @@ -625,6 +626,20 @@ static void machine_set_nvdimm_persistence(Object *obj, const char *value,
nvdimms_state->persistence_string = g_strdup(value);
}

static bool machine_get_cxl(Object *obj, Error **errp)
{
MachineState *ms = MACHINE(obj);

return ms->cxl_devices_state->is_enabled;
}

static void machine_set_cxl(Object *obj, bool value, Error **errp)
{
MachineState *ms = MACHINE(obj);

ms->cxl_devices_state->is_enabled = value;
}

void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type)
{
QAPI_LIST_PREPEND(mc->allowed_dynamic_sysbus_devices, g_strdup(type));
Expand Down Expand Up @@ -911,6 +926,8 @@ static void machine_class_init(ObjectClass *oc, void *data)
mc->default_ram_size = 128 * MiB;
mc->rom_file_has_mr = true;

/* Few machines support CXL, so default to off */
mc->cxl_supported = false;
/* numa node memory size aligned on 8MB by default.
* On Linux, each node's border has to be 8MB aligned
*/
Expand Down Expand Up @@ -1071,6 +1088,16 @@ static void machine_initfn(Object *obj)
"Valid values are cpu, mem-ctrl");
}

if (mc->cxl_supported) {
Object *obj = OBJECT(ms);

ms->cxl_devices_state = g_new0(CXLState, 1);
object_property_add_bool(obj, "cxl", machine_get_cxl, machine_set_cxl);
object_property_set_description(obj, "cxl",
"Set on/off to enable/disable "
"CXL instantiation");
}

if (mc->cpu_index_to_instance_props && mc->get_default_cpu_node_id) {
ms->numa_state = g_new0(NumaState, 1);
object_property_add_bool(obj, "hmat",
Expand Down Expand Up @@ -1108,6 +1135,7 @@ static void machine_finalize(Object *obj)
g_free(ms->device_memory);
g_free(ms->nvdimms_state);
g_free(ms->numa_state);
g_free(ms->cxl_devices_state);
}

bool machine_usb(MachineState *machine)
Expand Down
1 change: 1 addition & 0 deletions hw/i386/pc.c
Original file line number Diff line number Diff line change
Expand Up @@ -1761,6 +1761,7 @@ static void pc_machine_class_init(ObjectClass *oc, void *data)
mc->default_cpu_type = TARGET_DEFAULT_CPU_TYPE;
mc->nvdimm_supported = true;
mc->smp_props.dies_supported = true;
mc->cxl_supported = true;
mc->default_ram_id = "pc.ram";

object_class_property_add(oc, PC_MACHINE_MAX_RAM_BELOW_4G, "size",
Expand Down
2 changes: 2 additions & 0 deletions include/hw/boards.h
Original file line number Diff line number Diff line change
Expand Up @@ -269,6 +269,7 @@ struct MachineClass {
bool ignore_boot_device_suffixes;
bool smbus_no_migration_support;
bool nvdimm_supported;
bool cxl_supported;
bool numa_mem_supported;
bool auto_enable_numa;
SMPCompatProps smp_props;
Expand Down Expand Up @@ -359,6 +360,7 @@ struct MachineState {
CPUArchIdList *possible_cpus;
CpuTopology smp;
struct NVDIMMState *nvdimms_state;
struct CXLState *cxl_devices_state;
struct NumaState *numa_state;
};

Expand Down
4 changes: 4 additions & 0 deletions include/hw/cxl/cxl.h
Original file line number Diff line number Diff line change
Expand Up @@ -17,4 +17,8 @@
#define CXL_COMPONENT_REG_BAR_IDX 0
#define CXL_DEVICE_REG_BAR_IDX 2

typedef struct CXLState {
bool is_enabled;
} CXLState;

#endif

0 comments on commit abb3009

Please sign in to comment.