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ARM: correct handling of features in arch_extension
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The subtarget information is the ultimate source of truth for the feature set
that is enabled at this point.  We would previously not propagate the feature
information to the subtarget.  While this worked for the most part (features
would be enabled/disabled as requested), if another operation that changed the
feature bits was encountered (such as a mode switch via a .arm or .thumb
directive), we would end up resetting the behaviour of the architectural
extensions.

Handling this properly requires a slightly more complicated handling.  We need
to check if the feature is now being toggled.  If so, only then do we toggle the
features.  In return, we no longer have to calculate the feature bits ourselves.

The test changes are mostly to the diagnosis, which is now more uniform (a nice
side effect!).  Add an additional test to ensure that we handle this case
properly.

Thanks to Nico Weber for alerting me to this issue!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214057 91177308-0d34-0410-b5e6-96231b3b80d8
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compnerd committed Jul 27, 2014
1 parent ddbe5ab commit 77b9fc1
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Showing 6 changed files with 154 additions and 245 deletions.
23 changes: 12 additions & 11 deletions lib/Target/ARM/AsmParser/ARMAsmParser.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -9420,22 +9420,23 @@ bool ARMAsmParser::parseDirectiveArchExtension(SMLoc L) {
if (Extension.Name != Name)
continue;

unsigned FB = getAvailableFeatures();
if ((FB & Extension.ArchCheck) != Extension.ArchCheck) {
if (!Extension.Features)
report_fatal_error("unsupported architectural extension: " + Name);

if ((getAvailableFeatures() & Extension.ArchCheck) != Extension.ArchCheck) {
Error(ExtLoc, "architectural extension '" + Name + "' is not "
"allowed for the current base architecture");
return false;
}

if (!Extension.Features)
report_fatal_error("unsupported architectural extension: " + Name);

if (EnableFeature)
FB |= ComputeAvailableFeatures(Extension.Features);
else
FB &= ~ComputeAvailableFeatures(Extension.Features);

setAvailableFeatures(FB);
bool ToggleFeatures = EnableFeature
? (~STI.getFeatureBits() & Extension.Features)
: ( STI.getFeatureBits() & Extension.Features);
if (ToggleFeatures) {
unsigned Features =
ComputeAvailableFeatures(STI.ToggleFeature(Extension.Features));
setAvailableFeatures(Features);
}
return false;
}

Expand Down
12 changes: 6 additions & 6 deletions test/MC/ARM/directive-arch_extension-crc.s
Original file line number Diff line number Diff line change
Expand Up @@ -37,21 +37,21 @@ crc:
nocrc:
crc32b r0, r1, r2
@ CHECK-V7: error: instruction requires: crc armv8
@ CHECK-V8: error: instruction requires: crc arm-mode
@ CHECK-V8: error: instruction requires: crc
crc32h r0, r1, r2
@ CHECK-V7: error: instruction requires: crc armv8
@ CHECK-V8: error: instruction requires: crc arm-mode
@ CHECK-V8: error: instruction requires: crc
crc32w r0, r1, r2
@ CHECK-V7: error: instruction requires: crc armv8
@ CHECK-V8: error: instruction requires: crc arm-mode
@ CHECK-V8: error: instruction requires: crc

crc32cb r0, r1, r2
@ CHECK-V7: error: instruction requires: crc armv8
@ CHECK-V8: error: instruction requires: crc arm-mode
@ CHECK-V8: error: instruction requires: crc
crc32ch r0, r1, r2
@ CHECK-V7: error: instruction requires: crc armv8
@ CHECK-V8: error: instruction requires: crc arm-mode
@ CHECK-V8: error: instruction requires: crc
crc32cw r0, r1, r2
@ CHECK-V7: error: instruction requires: crc armv8
@ CHECK-V8: error: instruction requires: crc arm-mode
@ CHECK-V8: error: instruction requires: crc

191 changes: 65 additions & 126 deletions test/MC/ARM/directive-arch_extension-fp.s
Original file line number Diff line number Diff line change
@@ -1,11 +1,11 @@
@ RUN: not llvm-mc -triple armv7-eabi -filetype asm -o /dev/null 2>&1 %s \
@ RUN: | FileCheck %s -check-prefix CHECK-V7
@ RUN: | FileCheck %s -check-prefix CHECK-V7 -check-prefix CHECK
@ RUN: not llvm-mc -triple armv8-eabi -filetype asm -o /dev/null 2>&1 %s \
@ RUN: | FileCheck %s -check-prefix CHECK-V8
@ RUN: | FileCheck %s -check-prefix CHECK-V8 -check-prefix CHECK
@ RUN: not llvm-mc -triple thumbv7-eabi -filetype asm -o /dev/null 2>&1 %s \
@ RUN: | FileCheck %s -check-prefix CHECK-V7
@ RUN: | FileCheck %s -check-prefix CHECK-V7 -check-prefix CHECK
@ RUN: not llvm-mc -triple thumbv8-eabi -filetype asm -o /dev/null 2>&1 %s \
@ RUN: | FileCheck %s -check-prefix CHECK-V8
@ RUN: | FileCheck %s -check-prefix CHECK-V8 -check-prefix CHECK

.syntax unified

Expand Down Expand Up @@ -153,192 +153,131 @@ fp:
.type nofp,%function
nofp:
vmrs r0, mvfr2
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: FPARMv8
@ CHECK: error: instruction requires: FPARMv8

vselgt.f32 s0, s0, s0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vselge.f32 s0, s0, s0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vseleq.f32 s0, s0, s0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vselvs.f32 s0, s0, s0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vmaxnm.f32 s0, s0, s0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vminnm.f32 s0, s0, s0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: FPARMv8
@ CHECK: error: instruction requires: FPARMv8

vselgt.f64 d0, d0, d0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vselge.f64 d0, d0, d0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vseleq.f64 d0, d0, d0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vselvs.f64 d0, d0, d0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vmaxnm.f64 d0, d0, d0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vminnm.f64 d0, d0, d0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
@ CHECK: error: instruction requires: FPARMv8

vcvtb.f64.f16 d0, s0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vcvtb.f16.f64 s0, d0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vcvtt.f64.f16 d0, s0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vcvtt.f16.f64 s0, d0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
@ CHECK: error: instruction requires: FPARMv8

vcvta.s32.f32 s0, s0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vcvta.u32.f32 s0, s0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vcvta.s32.f64 s0, d0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vcvta.u32.f64 s0, d0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vcvtn.s32.f32 s0, s0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vcvtn.u32.f32 s0, s0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vcvtn.s32.f64 s0, d0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vcvtn.u32.f64 s0, d0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vcvtp.s32.f32 s0, s0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vcvtp.u32.f32 s0, s0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vcvtp.s32.f64 s0, d0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vcvtp.u32.f64 s0, d0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vcvtm.s32.f32 s0, s0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vcvtm.u32.f32 s0, s0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vcvtm.s32.f64 s0, d0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vcvtm.u32.f64 s0, d0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
@ CHECK: error: instruction requires: FPARMv8

vrintz.f32 s0, s1
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vrintz.f64 d0, d1
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vrintz.f32.f32 s0, s0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vrintz.f64.f64 d0, d0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vrintr.f32 s0, s1
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vrintr.f64 d0, d1
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vrintr.f32.f32 s0, s0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vrintr.f64.f64 d0, d0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vrintx.f32 s0, s1
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vrintx.f64 d0, d1
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vrintx.f32.f32 s0, s0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vrintx.f64.f64 d0, d0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
@ CHECK: error: instruction requires: FPARMv8

vrinta.f32 s0, s0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vrinta.f64 d0, d0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vrinta.f32.f32 s0, s0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vrinta.f64.f64 d0, d0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vrintn.f32 s0, s0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vrintn.f64 d0, d0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vrintn.f32.f32 s0, s0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vrintn.f64.f64 d0, d0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vrintp.f32 s0, s0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vrintp.f64 d0, d0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vrintp.f32.f32 s0, s0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vrintp.f64.f64 d0, d0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vrintm.f32 s0, s0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vrintm.f64 d0, d0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vrintm.f32.f32 s0, s0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: FPARMv8
@ CHECK: error: instruction requires: FPARMv8
vrintm.f64.f64 d0, d0
@ CHECK-V7: error: instruction requires: FPARMv8
@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
@ CHECK: error: instruction requires: FPARMv8

4 changes: 2 additions & 2 deletions test/MC/ARM/directive-arch_extension-idiv.s
Original file line number Diff line number Diff line change
Expand Up @@ -43,11 +43,11 @@ noidiv:
udiv r0, r1, r2
@ CHECK-ARMv6: error: instruction requires: divide in ARM
@ CHECK-THUMBv6: error: instruction requires: divide in ARM arm-mode
@ CHECK-ARMv7: error: instruction requires: divide in ARM arm-mode
@ CHECK-ARMv7: error: instruction requires: divide in ARM
@ CHECK-THUMBv7: error: instruction requires: divide in THUMB
sdiv r0, r1, r2
@ CHECK-ARMv6: error: instruction requires: divide in ARM
@ CHECK-THUMBv6: error: instruction requires: divide in ARM arm-mode
@ CHECK-ARMv7: error: instruction requires: divide in ARM arm-mode
@ CHECK-ARMv7: error: instruction requires: divide in ARM
@ CHECK-THUMBv7: error: instruction requires: divide in THUMB

17 changes: 17 additions & 0 deletions test/MC/ARM/directive-arch_extension-mode-switch.s
Original file line number Diff line number Diff line change
@@ -0,0 +1,17 @@
@ RUN: not llvm-mc -triple armv8-eabi -filetype asm -o /dev/null %s 2>&1 | FileCheck %s

@ Ensure that a mode switch does not revert the architectural features that were
@ alternated explicitly.

.syntax unified

.arch_extension noidiv

.arm
udiv r0, r0, r1
@ CHECK: instruction requires: divide in ARM

.thumb
udiv r0, r0, r1
@ CHECK: instruction requires: divide in THUMB

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