[DemandedBits] Reorder addition test checks. NFC.

As suggested on D72423 we should try to keep the same order as the original IR

llvm/test/Analysis/DemandedBits/add.ll

@@ -1,14 +1,14 @@
 ; RUN: opt -S -demanded-bits -analyze < %s | FileCheck %s
 ; RUN: opt -S -disable-output -passes="print<demanded-bits>" < %s 2>&1 | FileCheck %s
 
-; CHECK-DAG: DemandedBits: 0x1f for   %5 = or i32 %2, %3
-; CHECK-DAG: DemandedBits: 0xffffffff for   %8 = and i32 %7, 16
-; CHECK-DAG: DemandedBits: 0x1f for   %4 = and i32 %d, 4
 ; CHECK-DAG: DemandedBits: 0x1f for   %1 = and i32 %a, 9
+; CHECK-DAG: DemandedBits: 0x1f for   %2 = and i32 %b, 9
 ; CHECK-DAG: DemandedBits: 0x1f for   %3 = and i32 %c, 13
-; CHECK-DAG: DemandedBits: 0x10 for   %7 = add i32 %1, %6
+; CHECK-DAG: DemandedBits: 0x1f for   %4 = and i32 %d, 4
+; CHECK-DAG: DemandedBits: 0x1f for   %5 = or i32 %2, %3
 ; CHECK-DAG: DemandedBits: 0x1f for   %6 = or i32 %4, %5
-; CHECK-DAG: DemandedBits: 0x1f for   %2 = and i32 %b, 9
+; CHECK-DAG: DemandedBits: 0x10 for   %7 = add i32 %1, %6
+; CHECK-DAG: DemandedBits: 0xffffffff for   %8 = and i32 %7, 16
 define i32 @test_add(i32 %a, i32 %b, i32 %c, i32 %d) {
   %1 = and i32 %a, 9
   %2 = and i32 %b, 9