[DAGCombine] Fix for PR35765

Remove the acceptance of ANY_EXTEND nodes while trying to move and nodes back to loads. Bugzilla: https://bugs.llvm.org/show_bug.cgi?id=35765 Differential Revision: https://reviews.llvm.org/D41625 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321641 91177308-0d34-0410-b5e6-96231b3b80d8
emankov · Jan 2, 2018 · 2714c01 · 2714c01
1 parent 884b5fd
commit 2714c01
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Showing 2 changed files with 2 additions and 2 deletions.
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -3850,7 +3850,6 @@ bool DAGCombiner::SearchForAndLoads(SDNode *N,
       return false;
     }
     case ISD::ZERO_EXTEND:
-    case ISD::ANY_EXTEND:
     case ISD::AssertZext: {
       unsigned ActiveBits = Mask->getAPIntValue().countTrailingOnes();
       EVT ExtVT = EVT::getIntegerVT(*DAG.getContext(), ActiveBits);

diff --git a/test/CodeGen/X86/pr35765.ll b/test/CodeGen/X86/pr35765.ll
@@ -17,8 +17,9 @@ define void @PR35765() {
 ; CHECK-NEXT:    movzwl {{.*}}(%rip), %ecx
 ; CHECK-NEXT:    movzwl {{.*}}(%rip), %edx
 ; CHECK-NEXT:    notl %edx
+; CHECK-NEXT:    orl $63488, %edx # imm = 0xF800
+; CHECK-NEXT:    movzwl %dx, %edx
 ; CHECK-NEXT:    orl %ecx, %edx
-; CHECK-NEXT:    orl $-2048, %edx # imm = 0xF800
 ; CHECK-NEXT:    xorl %eax, %edx
 ; CHECK-NEXT:    movslq %edx, %rax
 ; CHECK-NEXT:    movq %rax, {{.*}}(%rip)