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[AArch64][Falkor] Fix sched details for FMOV
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303099 91177308-0d34-0410-b5e6-96231b3b80d8
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geoffberry committed May 15, 2017
1 parent dd98c46 commit 4333665
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Showing 2 changed files with 6 additions and 4 deletions.
7 changes: 5 additions & 2 deletions lib/Target/AArch64/AArch64SchedFalkorDetails.td
Original file line number Diff line number Diff line change
Expand Up @@ -430,10 +430,13 @@ def : InstRW<[FalkorWr_FMUL64_1VXVY_6cyc, ReadDefault, ReadDefault, FalkorReadFM

// FP Miscellaneous Instructions
// -----------------------------------------------------------------------------
def : InstRW<[FalkorWr_FMOV], (instregex "^FMOV(HW|HX|SW|DX|DXHigh)r$")>;
def : InstRW<[FalkorWr_FMOV], (instregex "^FMOV(H|S|D)i$")>;
def : InstRW<[FalkorWr_1GTOV_1cyc], (instregex "^FMOV(HW|HX|SW|DX|DXHigh)r$")>;
def : InstRW<[FalkorWr_1VTOG_1cyc], (instregex "^FCVTZ(S|U)(S|U)(W|X)(D|S)ri?$")>;
def : InstRW<[FalkorWr_1VTOG_1cyc], (instregex "^FMOV(WH|WS|XH|XD|XDHigh)r$")>;
def : InstRW<[FalkorWr_1VXVY_1cyc], (instregex "^FMOV(Hi|Hr|S0|Si|Sr|D0|Di|Dr|v.*_ns)$")>;
def : InstRW<[FalkorWr_1VXVY_1cyc], (instregex "^FMOV(Hr|Sr|Dr|v.*_ns)$")>;
// FIXME: We are currently generating movi v0.2d, #0 for these, which is worse than fmov 0.0
def : InstRW<[FalkorWr_2VXVY_1cyc], (instrs FMOVD0, FMOVS0)>;

def : InstRW<[FalkorWr_1GTOV_4cyc], (instregex "^(S|U)CVTF(S|U)(W|X)(D|S)ri$")>;
def : InstRW<[FalkorWr_1VXVY_4cyc], (instregex "^(S|U)CVTF(v1i16|v1i32|v2i32|v1i64|v4i16|v2f32|v4f16|d|s)(_shift)?")>;
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3 changes: 1 addition & 2 deletions lib/Target/AArch64/AArch64SchedFalkorWriteRes.td
Original file line number Diff line number Diff line change
Expand Up @@ -375,7 +375,7 @@ def FalkorReadFMA64 : SchedReadAdvance<2, [FalkorWr_FMUL64_1VXVY_6cyc, FalkorWr

// SchedPredicates and WriteVariants for Immediate Zero and LSLFast
// -----------------------------------------------------------------------------
def FalkorImmZPred : SchedPredicate<[{TII->isGPRZero(*MI)}]>;
def FalkorImmZPred : SchedPredicate<[{MI->getOperand(1).getImm() == 0}]>;
def FalkorLSLFastPred : SchedPredicate<[{TII->isFalkorLSLFast(*MI)}]>;

def FalkorWr_FMOV : SchedWriteVariant<[
Expand All @@ -392,7 +392,6 @@ def FalkorWr_LDR : SchedWriteVariant<[

def FalkorWr_ADD : SchedWriteVariant<[
SchedVar<FalkorLSLFastPred, [FalkorWr_1XYZ_1cyc]>,
SchedVar<FalkorImmZPred, [FalkorWr_1XYZ_1cyc]>,
SchedVar<NoSchedPred, [FalkorWr_2XYZ_2cyc]>]>;

def FalkorWr_PRFM : SchedWriteVariant<[
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