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Try to implement rcl and rcr
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tbodt committed Dec 20, 2018
1 parent e5dda61 commit e3496dc
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Showing 5 changed files with 17 additions and 9 deletions.
4 changes: 2 additions & 2 deletions emu/decode.h
Original file line number Diff line number Diff line change
Expand Up @@ -527,8 +527,8 @@ __no_instrument DECODER_RET glue(DECODER_NAME, OP_SIZE)(DECODER_ARGS) {
switch (modrm.opcode) { \
case 0: TRACE("rol"); ROL(count, val,z); break; \
case 1: TRACE("ror"); ROR(count, val,z); break; \
case 2: TRACE("rcl"); UNDEFINED; \
case 3: TRACE("rcr"); UNDEFINED; \
case 2: TRACE("rcl"); RCL(count, val,z); \
case 3: TRACE("rcr"); RCR(count, val,z); \
case 4: \
case 6: TRACE("shl"); SHL(count, val,z); break; \
case 5: TRACE("shr"); SHR(count, val,z); break; \
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3 changes: 3 additions & 0 deletions emu/interp.c
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Expand Up @@ -348,6 +348,9 @@ static bool modrm_compute(struct cpu_state *cpu, struct tlb *tlb, addr_t *addr_o
SETRESFLAGS; \
}

#define RCR(count, val,z) UNDEFINED
#define RCL(count, val,z) UNDEFINED

#define SHLD(count, extra, dst,z) \
if (get(count,8) % z != 0) { \
int cnt = get(count,8) % z; \
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5 changes: 4 additions & 1 deletion jit/gadgets-x86_64/bits.S
Original file line number Diff line number Diff line change
Expand Up @@ -9,6 +9,9 @@
.endif
testb $31, %cl
jz 1f
.ifin(\op, rcl,rcr)
btw $0, CPU_cf(%_cpu)
.endifin
\type\()\ss %cl, %tmp\s
setf_oc
.ifin(\type, shl,shr,sar)
Expand All @@ -27,7 +30,7 @@
.endr
.endm

.irp type, shl,shr,sar,rol,ror
.irp type, shl,shr,sar,rol,ror,rcl,rcr
.irp size, 8,16,32
ss \size, do_shift, \type
.endr
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2 changes: 2 additions & 0 deletions jit/gen.c
Original file line number Diff line number Diff line change
Expand Up @@ -279,6 +279,8 @@ static inline bool gen_op(struct gen_state *state, gadget_t *gadgets, enum arg a

#define ROL(count, val,z) los(rol, count, val, z)
#define ROR(count, val,z) los(ror, count, val, z)
#define RCL(count, val,z) los(rcl, count, val, z)
#define RCR(count, val,z) los(rcr, count, val, z)
#define SHL(count, val,z) los(shl, count, val, z)
#define SHR(count, val,z) los(shr, count, val, z)
#define SAR(count, val,z) los(sar, count, val, z)
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12 changes: 6 additions & 6 deletions tests/qemu-test.c
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Expand Up @@ -152,13 +152,13 @@ static inline long i2l(long v)
#define OP ror
#include "qemu-test-shift.h"

//#define OP rcr
//#define OP_CC
//#include "qemu-test-shift.h"
#define OP rcr
#define OP_CC
#include "qemu-test-shift.h"

//#define OP rcl
//#define OP_CC
//#include "qemu-test-shift.h"
#define OP rcl
#define OP_CC
#include "qemu-test-shift.h"

#define OP shld
#define OP_SHIFTD
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