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ccattuto / verilog-uart
Forked from hell03end/verilog-uartSimple UART implementation in Verilog
All code found on nandland is here. underconstruction.gif
this is verilog code for clock divider by n , n may be odd or even , and output clock is 50% duty cycle .
A simple 8 bit UART implementation in Verilog, with tests and timing diagrams
IrScrutinizer is a program for IR signal analysis, decoding, generation and much more.
Making Docker and Kubernetes management easy.
A fancy, easy-to-use and reactive self-hosted docker compose.yaml stack-oriented manager
An open-source & self-hostable Heroku / Netlify / Vercel alternative.
A simple API client (postman like) in your terminal
Bartosz Wiland: The spell-out algorithm and lexicalization patterns
Libhum is a Python GPU-accelerated library to extract and compare Electricity Frequency Signals (ENF)
Render markdown on the CLI, with pizzazz! 💅🏻
FLAC test files for multi-channel sound systems
Simple, fast, safe, compiled language for developing maintainable software. Compiles itself in <1s with zero library dependencies. Supports automatic C => V translation. https://vlang.io
ozkl / doomgeneric
Forked from maximevince/fbDOOMEasily portable doom
Performance analysis of the translation-based and interpreter-based approach to simulation on the example of Renode framework
lorf / csr-spi-ftdi
Forked from Frans-Willem/CsrSpiDriversUSB SPI programmer/debugger for CSR BlueCore bluetooth chips, based on FTDI USB to UART converter, for Linux and Windows
Programming language for literate programming law specification