arm64: dts: meson: g12b: w400: fix PHY deassert timing requirements

According to the datasheet (Rev. 1.9) the RTL8211F requires at least 72ms "for internal circuits settling time" before accessing the PHY egisters. On similar boards with the same PHY this fixes an issue where Ethernet link would not come up when using ip link set down/up. Fixes: 2cd2310 ("arm64: dts: meson-g12b-ugoos-am6: add initial device-tree") Reviewed-by: Martin Blumenstingl <[email protected]> Signed-off-by: Stefan Agner <[email protected]> Signed-off-by: Kevin Hilman <[email protected]> Link: https://lore.kernel.org/r/46298e66572784c44f873f1b71cc4ab3d8fc5aa6.1607363522.git.stefan@agner.ch
fracktal · Dec 7, 2020 · 9e454e3 · 9e454e3
1 parent 3d07c3b
commit 9e454e3
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-w400.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-w400.dtsi
@@ -264,7 +264,7 @@
 		max-speed = <1000>;
 
 		reset-assert-us = <10000>;
-		reset-deassert-us = <30000>;
+		reset-deassert-us = <80000>;
 		reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
 
 		interrupt-parent = <&gpio_intc>;