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sh/mmiowb: Add unconditional mmiowb() to arch_spin_unlock()
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The mmiowb() macro is horribly difficult to use and drivers will continue
to work most of the time if they omit a call when it is required.

Rather than rely on driver authors getting this right, push mmiowb() into
arch_spin_unlock() for sh. If this is deemed to be a performance issue,
a subsequent optimisation could make use of ARCH_HAS_MMIOWB to elide
the barrier in cases where no I/O writes were performed inside the
critical section.

Cc: Yoshinori Sato <[email protected]>
Cc: Rich Felker <[email protected]>
Acked-by: Linus Torvalds <[email protected]>
Signed-off-by: Will Deacon <[email protected]>
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wildea01 committed Apr 8, 2019
1 parent 0f43ca6 commit e9e8543
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Showing 4 changed files with 14 additions and 4 deletions.
1 change: 0 additions & 1 deletion arch/sh/include/asm/Kbuild
Original file line number Diff line number Diff line change
Expand Up @@ -14,7 +14,6 @@ generic-y += local.h
generic-y += local64.h
generic-y += mcs_spinlock.h
generic-y += mm-arch-hooks.h
generic-y += mmiowb.h
generic-y += parport.h
generic-y += percpu.h
generic-y += preempt.h
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3 changes: 0 additions & 3 deletions arch/sh/include/asm/io.h
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Expand Up @@ -229,9 +229,6 @@ __BUILD_IOPORT_STRING(q, u64)

#define IO_SPACE_LIMIT 0xffffffff

/* synco on SH-4A, otherwise a nop */
#define mmiowb() wmb()

/* We really want to try and get these to memcpy etc */
void memcpy_fromio(void *, const volatile void __iomem *, unsigned long);
void memcpy_toio(volatile void __iomem *, const void *, unsigned long);
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12 changes: 12 additions & 0 deletions arch/sh/include/asm/mmiowb.h
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@@ -0,0 +1,12 @@
/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __ASM_SH_MMIOWB_H
#define __ASM_SH_MMIOWB_H

#include <asm/barrier.h>

/* synco on SH-4A, otherwise a nop */
#define mmiowb() wmb()

#include <asm-generic/mmiowb.h>

#endif /* __ASM_SH_MMIOWB_H */
2 changes: 2 additions & 0 deletions arch/sh/include/asm/spinlock-llsc.h
Original file line number Diff line number Diff line change
Expand Up @@ -47,6 +47,8 @@ static inline void arch_spin_unlock(arch_spinlock_t *lock)
{
unsigned long tmp;

/* This could be optimised with ARCH_HAS_MMIOWB */
mmiowb();
__asm__ __volatile__ (
"mov #1, %0 ! arch_spin_unlock \n\t"
"mov.l %0, @%1 \n\t"
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