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chrisdearman

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Commits on Jul 5, 2010

• MIPS: Restore signalling NaN behaviour for abs.[sd]

  Show description for e48682d
  

  chrisdearman

  authored and

  ralfbaechle

  committed
  e48682d

Commits on Nov 2, 2009

• MIPS: GIC: Random fixes and enhancements.

  Show description for 7098f74
  

  chrisdearman

  authored and

  ralfbaechle

  committed
  7098f74

• MIPS: CMP: Fix memory barriers for correct operation of amon_cpu_start

  Show description for 2ee0a42
  

  chrisdearman

  authored and

  ralfbaechle

  committed
  2ee0a42

• MIPS: SPRAM: Clean up support code a little

  Show description for a074f0e
  

  chrisdearman

  authored and

  ralfbaechle

  committed
  a074f0e

• MIPS: MTI: Fix accesses to device registers on MIPS boards

  Show description for accfd35
  

  chrisdearman

  authored and

  ralfbaechle

  committed
  accfd35

Commits on Mar 23, 2009

• MIPS: R2: Fix problem with code that incorrectly modifies ebase.

  Show description for 9fb4c2b
  

  chrisdearman

  authored and

  ralfbaechle

  committed
  9fb4c2b

Commits on Jun 16, 2008

• [MIPS] vpe_id is required for VSMP and SMTC builds

  Show description for d6c3048
  

  chrisdearman

  authored and

  ralfbaechle

  committed
  d6c3048

Commits on Apr 28, 2008

• [MIPS] Add CoreFPGA5 support; distinguish between SOCit/ROCit

  Show description for 3084024
  

  chrisdearman

  authored and

  ralfbaechle

  committed
  3084024

• [MIPS] Add noulri kernel argument to disable "rdhwr $29" usermode support.

  Show description for bdc94eb
  

  chrisdearman

  authored and

  ralfbaechle

  committed
  bdc94eb

• [MIPS] Allow setting of the cache attribute at run time.

  Show description for 3513369
  

  chrisdearman

  authored and

  ralfbaechle

  committed
  3513369

• [MIPS] Tidy up cache attributes

  Show description for bec5052
  

  chrisdearman

  authored and

  ralfbaechle

  committed
  bec5052

• [MIPS] All MIPS32 processors support64-bit physical addresses.

  Show description for 962f480
  

  chrisdearman

  authored and

  ralfbaechle

  committed
  962f480

• [MIPS] Remove TLB sanitation code

  Show description for 0bfa130
  

  chrisdearman

  authored and

  ralfbaechle

  committed
  0bfa130

• [MIPS] Basic SPRAM support

  Show description for 0b6d497
  

  chrisdearman

  authored and

  ralfbaechle

  committed
  0b6d497

• mm: try both endianess when checking for endianess

  Show description for 797df57
  

  chrisdearman

  authored and

  torvalds

  committed
  797df57

Commits on Mar 12, 2008

• [MIPS] Added missing cases for rdhwr emulation

  Show description for 1f5826b
  

  chrisdearman

  authored and

  ralfbaechle

  committed
  1f5826b

Commits on Mar 5, 2008

• .gitignore: ignore emacs backup and temporary files.

  Show description for 7088655
  

  chrisdearman

  authored and

  Linus Torvalds

  committed
  7088655

Commits on Dec 14, 2007

• [MIPS] Ensure that ST0_FR is never set on a 32 bit kernel

  Show description for bbaf238
  

  chrisdearman

  authored and

  ralfbaechle

  committed
  bbaf238

Commits on Dec 9, 2007

• [MIPS] Don't byteswap writes to display when running bigendian

  Show description for 6d2d419
  

  chrisdearman

  authored and

  ralfbaechle

  committed
  6d2d419

Commits on Jul 31, 2007

• [MIPS] MTI: Add CoreFPGA4 ID.

  Show description for a11b18e
  

  chrisdearman

  authored and

  ralfbaechle

  committed
  a11b18e

Commits on Jul 10, 2007

• [MIPS] Early check for SMTC kernel on non-MT processor

  Show description for ecd27b9
  

  chrisdearman

  authored and

  ralfbaechle

  committed
  ecd27b9

Commits on Jul 6, 2007

• [MIPS] Fix timer/performance interrupt detection

  Show description for c3e838a
  

  chrisdearman

  authored and

  ralfbaechle

  committed
  c3e838a

Commits on Jun 26, 2007

• [MIPS] Count timer interrupts correctly.

  Show description for 8e15a0e
  

  chrisdearman

  authored and

  ralfbaechle

  committed
  8e15a0e

Commits on Jun 14, 2007

• [MIPS] Fix builds where MSC01E_xxx is undefined.

  Show description for 7b4f4ec
  

  chrisdearman

  authored and

  ralfbaechle

  committed
  7b4f4ec

• [MIPS] Separate performance counter interrupts

  Show description for ffe9ee4
  

  chrisdearman

  authored and

  ralfbaechle

  committed
  ffe9ee4

• [MIPS] Malta: Fix for SOCitSC based Maltas

  Show description for b72c052
  

  chrisdearman

  authored and

  ralfbaechle

  committed
  b72c052

Commits on Jun 11, 2007

• [MIPS] SMTC: Fix build error caused by nonsense code.

  Show description for cf75789
  

  chrisdearman

  authored and

  ralfbaechle

  committed
  cf75789

• [MIPS] Always install the DSP exception handler.

  Show description for acaec42
  

  chrisdearman

  authored and

  ralfbaechle

  committed
  acaec42

Commits on Jun 6, 2007

• [MIPS] Remove duplicate fpu enable hazard code.

  Show description for f9509c8
  

  chrisdearman

  authored and

  ralfbaechle

  committed
  f9509c8

Commits on May 11, 2007

• [MIPS] FPU hazard handling

  Show description for 0b62495
  

  chrisdearman

  authored and

  ralfbaechle

  committed
  0b62495

• [MIPS] MT: Reenable EIC support and add support for SOCit SC.

  Show description for d725cf3
  

  chrisdearman

  authored and

  ralfbaechle

  committed
  d725cf3

Commits on Mar 29, 2007

• [MIPS] lockdep: Deal with interrupt disable hazard in TRACE_IRQFLAGS

  Show description for fe99f1b
  

  chrisdearman

  authored and

  ralfbaechle

  committed
  fe99f1b

• [MIPS] lockdep: Handle interrupts in R3000 style c0_status register.

  Show description for cbde5eb
  

  chrisdearman

  authored and

  ralfbaechle

  committed
  cbde5eb

Commits on Mar 13, 2007

• [MIPS] Oprofile: Reset all performance registers for MIPS_MT_SMP configs

  Show description for 795a225
  

  chrisdearman

  authored and

  ralfbaechle

  committed
  795a225

Commits on Feb 6, 2007

• [MIPS] Comment fix

  Show description for 131c1a2
  

  chrisdearman

  authored and

  ralfbaechle

  committed
  131c1a2

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