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Signed-off-by: Felix Fietkau <[email protected]>
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Felix Fietkau
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Nov 20, 2014
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EXTRA_CFLAGS += -Werror | ||
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obj-m := mt76pci.o | ||
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mt76pci-y := \ | ||
pci.o dma.o \ | ||
main.o init.o debugfs.o tx.o util.o \ | ||
core.o mac.o eeprom.o mcu.o phy.o \ | ||
trace.o |
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/* | ||
* Copyright (C) 2014 Felix Fietkau <[email protected]> | ||
* | ||
* This program is free software; you can redistribute it and/or modify | ||
* it under the terms of the GNU General Public License version 2 | ||
* as published by the Free Software Foundation | ||
* | ||
* This program is distributed in the hope that it will be useful, | ||
* but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
* GNU General Public License for more details. | ||
*/ | ||
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#include <linux/delay.h> | ||
#include "mt76.h" | ||
#include "trace.h" | ||
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bool mt76_poll(struct mt76_dev *dev, u32 offset, u32 mask, u32 val, | ||
int timeout) | ||
{ | ||
u32 cur; | ||
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timeout /= 10; | ||
do { | ||
cur = mt76_rr(dev, offset) & mask; | ||
if (cur == val) | ||
return true; | ||
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udelay(10); | ||
} while (timeout-- > 0); | ||
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return false; | ||
} | ||
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bool mt76_poll_msec(struct mt76_dev *dev, u32 offset, u32 mask, u32 val, | ||
int timeout) | ||
{ | ||
u32 cur; | ||
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timeout /= 10; | ||
do { | ||
cur = mt76_rr(dev, offset) & mask; | ||
if (cur == val) | ||
return true; | ||
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msleep(10); | ||
} while (timeout-- > 0); | ||
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return false; | ||
} | ||
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void mt76_write_reg_pairs(struct mt76_dev *dev, | ||
const struct mt76_reg_pair *data, int len) | ||
{ | ||
while (len > 0) { | ||
mt76_wr(dev, data->reg, data->value); | ||
len--; | ||
data++; | ||
} | ||
} | ||
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void mt76_set_irq_mask(struct mt76_dev *dev, u32 clear, u32 set) | ||
{ | ||
unsigned long flags; | ||
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spin_lock_irqsave(&dev->irq_lock, flags); | ||
dev->irqmask &= ~clear; | ||
dev->irqmask |= set; | ||
mt76_wr(dev, MT_INT_MASK_CSR, dev->irqmask); | ||
spin_unlock_irqrestore(&dev->irq_lock, flags); | ||
} | ||
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irqreturn_t mt76_irq_handler(int irq, void *dev_instance) | ||
{ | ||
struct mt76_dev *dev = dev_instance; | ||
u32 intr; | ||
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intr = mt76_rr(dev, MT_INT_SOURCE_CSR); | ||
mt76_wr(dev, MT_INT_SOURCE_CSR, intr); | ||
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if (!test_bit(MT76_STATE_INITAILIZED, &dev->state)) | ||
return IRQ_NONE; | ||
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trace_dev_irq(dev, intr, dev->irqmask); | ||
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intr &= dev->irqmask; | ||
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if (intr & MT_INT_TX_DONE_ALL) { | ||
mt76_irq_disable(dev, MT_INT_TX_DONE_ALL); | ||
tasklet_schedule(&dev->tx_tasklet); | ||
} | ||
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if (intr & MT_INT_RX_DONE(0)) { | ||
mt76_irq_disable(dev, MT_INT_RX_DONE(0)); | ||
napi_schedule(&dev->napi); | ||
} | ||
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if (intr & MT_INT_RX_DONE(1)) { | ||
mt76_irq_disable(dev, MT_INT_RX_DONE(1)); | ||
tasklet_schedule(&dev->rx_tasklet); | ||
} | ||
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if (intr & MT_INT_PRE_TBTT) | ||
tasklet_schedule(&dev->pre_tbtt_tasklet); | ||
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/* send buffered multicast frames now */ | ||
if (intr & MT_INT_TBTT) | ||
mt76_kick_queue(dev, &dev->q_tx[MT_TXQ_PSD]); | ||
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if (intr & MT_INT_TX_STAT) { | ||
mt76_mac_poll_tx_status(dev, true); | ||
tasklet_schedule(&dev->tx_tasklet); | ||
} | ||
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return IRQ_HANDLED; | ||
} | ||
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int mt76_set_channel(struct mt76_dev *dev, struct cfg80211_chan_def *chandef) | ||
{ | ||
int ret; | ||
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tasklet_disable(&dev->pre_tbtt_tasklet); | ||
cancel_delayed_work_sync(&dev->cal_work); | ||
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mt76_mac_stop(dev, true); | ||
ret = mt76_phy_set_channel(dev, chandef); | ||
mt76_mac_resume(dev); | ||
tasklet_enable(&dev->pre_tbtt_tasklet); | ||
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return ret; | ||
} | ||
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@@ -0,0 +1,89 @@ | ||
/* | ||
* Copyright (C) 2014 Felix Fietkau <[email protected]> | ||
* | ||
* This program is free software; you can redistribute it and/or modify | ||
* it under the terms of the GNU General Public License version 2 | ||
* as published by the Free Software Foundation | ||
* | ||
* This program is distributed in the hope that it will be useful, | ||
* but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
* GNU General Public License for more details. | ||
*/ | ||
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#include <linux/debugfs.h> | ||
#include "mt76.h" | ||
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static int | ||
mt76_reg_set(void *data, u64 val) | ||
{ | ||
struct mt76_dev *dev = data; | ||
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mt76_wr(dev, dev->debugfs_reg, val); | ||
return 0; | ||
} | ||
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static int | ||
mt76_reg_get(void *data, u64 *val) | ||
{ | ||
struct mt76_dev *dev = data; | ||
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*val = mt76_rr(dev, dev->debugfs_reg); | ||
return 0; | ||
} | ||
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DEFINE_SIMPLE_ATTRIBUTE(fops_regval, mt76_reg_get, mt76_reg_set, "0x%08llx\n"); | ||
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static int | ||
mt76_ampdu_stat_read(struct seq_file *file, void *data) | ||
{ | ||
struct mt76_dev *dev = file->private; | ||
int i, j; | ||
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for (i = 0; i < 4; i++) { | ||
seq_puts(file, "Length: "); | ||
for (j = 0; j < 8; j++) | ||
seq_printf(file, "%8d | ", i * 8 + j + 1); | ||
seq_puts(file, "\n"); | ||
seq_puts(file, "Count: "); | ||
for (j = 0; j < 8; j++) | ||
seq_printf(file, "%8d | ", dev->aggr_stats[i * 8 + j]); | ||
seq_puts(file, "\n"); | ||
seq_puts(file, "--------"); | ||
for (j = 0; j < 8; j++) | ||
seq_puts(file, "-----------"); | ||
seq_puts(file, "\n"); | ||
} | ||
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return 0; | ||
} | ||
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static int | ||
mt76_ampdu_stat_open(struct inode *inode, struct file *f) | ||
{ | ||
return single_open(f, mt76_ampdu_stat_read, inode->i_private); | ||
} | ||
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static const struct file_operations fops_ampdu_stat = { | ||
.open = mt76_ampdu_stat_open, | ||
.read = seq_read, | ||
.llseek = seq_lseek, | ||
.release = single_release, | ||
}; | ||
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void mt76_init_debugfs(struct mt76_dev *dev) | ||
{ | ||
struct dentry *dir; | ||
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dir = debugfs_create_dir("mt76", dev->hw->wiphy->debugfsdir); | ||
if (!dir) | ||
return; | ||
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debugfs_create_blob("eeprom", S_IRUSR, dir, &dev->eeprom); | ||
debugfs_create_u8("temperature", S_IRUSR, dir, &dev->cal.temp); | ||
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debugfs_create_u32("regidx", S_IRUSR | S_IWUSR, dir, &dev->debugfs_reg); | ||
debugfs_create_file("regval", S_IRUSR | S_IWUSR, dir, dev, &fops_regval); | ||
debugfs_create_file("ampdu_stat", S_IRUSR, dir, dev, &fops_ampdu_stat); | ||
} |
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