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KVM: VMX: Add lazy FPU support for VT
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Only save/restore the FPU host state when the guest is actually using the
FPU.

Signed-off-by: Anthony Liguori <[email protected]>
Signed-off-by: Avi Kivity <[email protected]>
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Anthony Liguori authored and avikivity committed May 3, 2007
1 parent 25c4c27 commit 2ab455c
Showing 1 changed file with 56 additions and 5 deletions.
61 changes: 56 additions & 5 deletions drivers/kvm/vmx.c
Original file line number Diff line number Diff line change
Expand Up @@ -101,6 +101,13 @@ static inline int is_page_fault(u32 intr_info)
(INTR_TYPE_EXCEPTION | PF_VECTOR | INTR_INFO_VALID_MASK);
}

static inline int is_no_device(u32 intr_info)
{
return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
INTR_INFO_VALID_MASK)) ==
(INTR_TYPE_EXCEPTION | NM_VECTOR | INTR_INFO_VALID_MASK);
}

static inline int is_external_interrupt(u32 intr_info)
{
return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VALID_MASK))
Expand Down Expand Up @@ -216,6 +223,16 @@ static void vmcs_write64(unsigned long field, u64 value)
#endif
}

static void vmcs_clear_bits(unsigned long field, u32 mask)
{
vmcs_writel(field, vmcs_readl(field) & ~mask);
}

static void vmcs_set_bits(unsigned long field, u32 mask)
{
vmcs_writel(field, vmcs_readl(field) | mask);
}

/*
* Switches to specified vcpu, until a matching vcpu_put(), but assumes
* vcpu mutex is already taken.
Expand Down Expand Up @@ -833,6 +850,11 @@ static void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
}
#endif

if (!(cr0 & CR0_TS_MASK)) {
vcpu->fpu_active = 1;
vmcs_clear_bits(EXCEPTION_BITMAP, CR0_TS_MASK);
}

vmcs_writel(CR0_READ_SHADOW, cr0);
vmcs_writel(GUEST_CR0,
(cr0 & ~KVM_GUEST_CR0_MASK) | KVM_VM_CR0_ALWAYS_ON);
Expand All @@ -842,6 +864,12 @@ static void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
static void vmx_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
{
vmcs_writel(GUEST_CR3, cr3);

if (!(vcpu->cr0 & CR0_TS_MASK)) {
vcpu->fpu_active = 0;
vmcs_set_bits(GUEST_CR0, CR0_TS_MASK);
vmcs_set_bits(EXCEPTION_BITMAP, 1 << NM_VECTOR);
}
}

static void vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
Expand Down Expand Up @@ -1368,6 +1396,15 @@ static int handle_exception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
asm ("int $2");
return 1;
}

if (is_no_device(intr_info)) {
vcpu->fpu_active = 1;
vmcs_clear_bits(EXCEPTION_BITMAP, 1 << NM_VECTOR);
if (!(vcpu->cr0 & CR0_TS_MASK))
vmcs_clear_bits(GUEST_CR0, CR0_TS_MASK);
return 1;
}

error_code = 0;
rip = vmcs_readl(GUEST_RIP);
if (intr_info & INTR_INFO_DELIEVER_CODE_MASK)
Expand Down Expand Up @@ -1556,7 +1593,11 @@ static int handle_cr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
break;
case 2: /* clts */
vcpu_load_rsp_rip(vcpu);
set_cr0(vcpu, vcpu->cr0 & ~CR0_TS_MASK);
vcpu->fpu_active = 1;
vmcs_clear_bits(EXCEPTION_BITMAP, 1 << NM_VECTOR);
vmcs_clear_bits(GUEST_CR0, CR0_TS_MASK);
vcpu->cr0 &= ~CR0_TS_MASK;
vmcs_writel(CR0_READ_SHADOW, vcpu->cr0);
skip_emulated_instruction(vcpu);
return 1;
case 1: /*mov from cr*/
Expand Down Expand Up @@ -1806,8 +1847,14 @@ static int vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
if (vcpu->guest_debug.enabled)
kvm_guest_debug_pre(vcpu);

fx_save(vcpu->host_fx_image);
fx_restore(vcpu->guest_fx_image);
if (vcpu->fpu_active) {
fx_save(vcpu->host_fx_image);
fx_restore(vcpu->guest_fx_image);
}
/*
* Loading guest fpu may have cleared host cr0.ts
*/
vmcs_writel(HOST_CR0, read_cr0());

#ifdef CONFIG_X86_64
if (is_long_mode(vcpu)) {
Expand Down Expand Up @@ -1965,8 +2012,11 @@ static int vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
}
#endif

fx_save(vcpu->guest_fx_image);
fx_restore(vcpu->host_fx_image);
if (vcpu->fpu_active) {
fx_save(vcpu->guest_fx_image);
fx_restore(vcpu->host_fx_image);
}

vcpu->interrupt_window_open = (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0;

asm ("mov %0, %%ds; mov %0, %%es" : : "r"(__USER_DS));
Expand Down Expand Up @@ -2078,6 +2128,7 @@ static int vmx_create_vcpu(struct kvm_vcpu *vcpu)
vmcs_clear(vmcs);
vcpu->vmcs = vmcs;
vcpu->launched = 0;
vcpu->fpu_active = 1;

return 0;

Expand Down

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