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[libata] Address some checkpatch-spotted issues
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Signed-off-by: Jeff Garzik <[email protected]>
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Jeff Garzik committed Oct 29, 2007
1 parent b447916 commit 5796d1c
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Showing 15 changed files with 244 additions and 220 deletions.
12 changes: 6 additions & 6 deletions drivers/ata/pata_pcmcia.c
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Original file line number Diff line number Diff line change
Expand Up @@ -74,8 +74,7 @@ static int pcmcia_set_mode(struct ata_link *link, struct ata_device **r_failed_d
return ata_do_set_mode(link, r_failed_dev);

if (memcmp(master->id + ATA_ID_FW_REV, slave->id + ATA_ID_FW_REV,
ATA_ID_FW_REV_LEN + ATA_ID_PROD_LEN) == 0)
{
ATA_ID_FW_REV_LEN + ATA_ID_PROD_LEN) == 0) {
/* Suspicious match, but could be two cards from
the same vendor - check serial */
if (memcmp(master->id + ATA_ID_SERNO, slave->id + ATA_ID_SERNO,
Expand Down Expand Up @@ -248,7 +247,8 @@ static int pcmcia_init_one(struct pcmcia_device *pdev)
goto next_entry;
io_base = pdev->io.BasePort1;
ctl_base = pdev->io.BasePort1 + 0x0e;
} else goto next_entry;
} else
goto next_entry;
/* If we've got this far, we're done */
break;
}
Expand Down Expand Up @@ -285,8 +285,8 @@ static int pcmcia_init_one(struct pcmcia_device *pdev)
printk(KERN_WARNING DRV_NAME ": second channel not yet supported.\n");

/*
* Having done the PCMCIA plumbing the ATA side is relatively
* sane.
* Having done the PCMCIA plumbing the ATA side is relatively
* sane.
*/
ret = -ENOMEM;
host = ata_host_alloc(&pdev->dev, 1);
Expand Down Expand Up @@ -363,7 +363,7 @@ static struct pcmcia_device_id pcmcia_devices[] = {
PCMCIA_DEVICE_MANF_CARD(0x0098, 0x0000), /* Toshiba */
PCMCIA_DEVICE_MANF_CARD(0x00a4, 0x002d),
PCMCIA_DEVICE_MANF_CARD(0x00ce, 0x0000), /* Samsung */
PCMCIA_DEVICE_MANF_CARD(0x0319, 0x0000), /* Hitachi */
PCMCIA_DEVICE_MANF_CARD(0x0319, 0x0000), /* Hitachi */
PCMCIA_DEVICE_MANF_CARD(0x2080, 0x0001),
PCMCIA_DEVICE_MANF_CARD(0x4e01, 0x0100), /* Viking CFA */
PCMCIA_DEVICE_MANF_CARD(0x4e01, 0x0200), /* Lexar, Viking CFA */
Expand Down
12 changes: 6 additions & 6 deletions drivers/ata/pdc_adma.c
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Original file line number Diff line number Diff line change
Expand Up @@ -47,10 +47,10 @@
#define DRV_VERSION "1.0"

/* macro to calculate base address for ATA regs */
#define ADMA_ATA_REGS(base,port_no) ((base) + ((port_no) * 0x40))
#define ADMA_ATA_REGS(base, port_no) ((base) + ((port_no) * 0x40))

/* macro to calculate base address for ADMA regs */
#define ADMA_REGS(base,port_no) ((base) + 0x80 + ((port_no) * 0x20))
#define ADMA_REGS(base, port_no) ((base) + 0x80 + ((port_no) * 0x20))

/* macro to obtain addresses from ata_port */
#define ADMA_PORT_REGS(ap) \
Expand Down Expand Up @@ -128,7 +128,7 @@ struct adma_port_priv {
adma_state_t state;
};

static int adma_ata_init_one (struct pci_dev *pdev,
static int adma_ata_init_one(struct pci_dev *pdev,
const struct pci_device_id *ent);
static int adma_port_start(struct ata_port *ap);
static void adma_host_stop(struct ata_host *host);
Expand Down Expand Up @@ -340,8 +340,8 @@ static int adma_fill_sg(struct ata_queued_cmd *qc)
buf[i++] = 0; /* pPKLW */
buf[i++] = 0; /* reserved */

*(__le32 *)(buf + i)
= (pFLAGS & pEND) ? 0 : cpu_to_le32(pp->pkt_dma + i + 4);
*(__le32 *)(buf + i) =
(pFLAGS & pEND) ? 0 : cpu_to_le32(pp->pkt_dma + i + 4);
i += 4;

VPRINTK("PRD[%u] = (0x%lX, 0x%X)\n", i/4,
Expand Down Expand Up @@ -617,7 +617,7 @@ static int adma_port_start(struct ata_port *ap)
return -ENOMEM;
/* paranoia? */
if ((pp->pkt_dma & 7) != 0) {
printk("bad alignment for pp->pkt_dma: %08x\n",
printk(KERN_ERR "bad alignment for pp->pkt_dma: %08x\n",
(u32)pp->pkt_dma);
return -ENOMEM;
}
Expand Down
2 changes: 1 addition & 1 deletion drivers/ata/sata_inic162x.c
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Original file line number Diff line number Diff line change
Expand Up @@ -143,7 +143,7 @@ static const int scr_map[] = {
[SCR_CONTROL] = 2,
};

static void __iomem * inic_port_base(struct ata_port *ap)
static void __iomem *inic_port_base(struct ata_port *ap)
{
return ap->host->iomap[MMIO_BAR] + ap->port_no * PORT_SIZE;
}
Expand Down
7 changes: 4 additions & 3 deletions drivers/ata/sata_mv.c
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Original file line number Diff line number Diff line change
Expand Up @@ -1156,7 +1156,7 @@ static void mv_fill_sg(struct ata_queued_cmd *qc)
last_sg->flags_size |= cpu_to_le32(EPRD_FLAG_END_OF_TBL);
}

static inline void mv_crqb_pack_cmd(__le16 *cmdw, u8 data, u8 addr, unsigned last)
static void mv_crqb_pack_cmd(__le16 *cmdw, u8 data, u8 addr, unsigned last)
{
u16 tmp = data | (addr << CRQB_CMD_ADDR_SHIFT) | CRQB_CMD_CS |
(last ? CRQB_CMD_LAST : 0);
Expand Down Expand Up @@ -2429,7 +2429,7 @@ static int mv_chip_id(struct ata_host *host, unsigned int board_idx)
struct mv_host_priv *hpriv = host->private_data;
u32 hp_flags = hpriv->hp_flags;

switch(board_idx) {
switch (board_idx) {
case chip_5080:
hpriv->ops = &mv5xxx_ops;
hp_flags |= MV_HP_GEN_I;
Expand Down Expand Up @@ -2510,7 +2510,8 @@ static int mv_chip_id(struct ata_host *host, unsigned int board_idx)
break;

default:
printk(KERN_ERR DRV_NAME ": BUG: invalid board index %u\n", board_idx);
dev_printk(KERN_ERR, &pdev->dev,
"BUG: invalid board index %u\n", board_idx);
return 1;
}

Expand Down
70 changes: 37 additions & 33 deletions drivers/ata/sata_nv.c
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Original file line number Diff line number Diff line change
Expand Up @@ -291,7 +291,7 @@ struct nv_swncq_port_priv {
};


#define NV_ADMA_CHECK_INTR(GCTL, PORT) ((GCTL) & ( 1 << (19 + (12 * (PORT)))))
#define NV_ADMA_CHECK_INTR(GCTL, PORT) ((GCTL) & (1 << (19 + (12 * (PORT)))))

static int nv_init_one(struct pci_dev *pdev, const struct pci_device_id *ent);
#ifdef CONFIG_PM
Expand Down Expand Up @@ -884,8 +884,9 @@ static int nv_adma_check_cpb(struct ata_port *ap, int cpb_num, int force_err)
/* Notifier bits set without a command may indicate the drive
is misbehaving. Raise host state machine violation on this
condition. */
ata_port_printk(ap, KERN_ERR, "notifier for tag %d with no command?\n",
cpb_num);
ata_port_printk(ap, KERN_ERR,
"notifier for tag %d with no cmd?\n",
cpb_num);
ehi->err_mask |= AC_ERR_HSM;
ehi->action |= ATA_EH_SOFTRESET;
ata_port_freeze(ap);
Expand Down Expand Up @@ -1021,8 +1022,8 @@ static irqreturn_t nv_adma_interrupt(int irq, void *dev_instance)
while ((pos = ffs(check_commands)) && !error) {
pos--;
error = nv_adma_check_cpb(ap, pos,
notifier_error & (1 << pos) );
check_commands &= ~(1 << pos );
notifier_error & (1 << pos));
check_commands &= ~(1 << pos);
}
}
}
Expand Down Expand Up @@ -1061,7 +1062,7 @@ static void nv_adma_freeze(struct ata_port *ap)
tmp = readw(mmio + NV_ADMA_CTL);
writew(tmp & ~(NV_ADMA_CTL_AIEN | NV_ADMA_CTL_HOTPLUG_IEN),
mmio + NV_ADMA_CTL);
readw(mmio + NV_ADMA_CTL ); /* flush posted write */
readw(mmio + NV_ADMA_CTL); /* flush posted write */
}

static void nv_adma_thaw(struct ata_port *ap)
Expand All @@ -1079,7 +1080,7 @@ static void nv_adma_thaw(struct ata_port *ap)
tmp = readw(mmio + NV_ADMA_CTL);
writew(tmp | (NV_ADMA_CTL_AIEN | NV_ADMA_CTL_HOTPLUG_IEN),
mmio + NV_ADMA_CTL);
readw(mmio + NV_ADMA_CTL ); /* flush posted write */
readw(mmio + NV_ADMA_CTL); /* flush posted write */
}

static void nv_adma_irq_clear(struct ata_port *ap)
Expand Down Expand Up @@ -1165,7 +1166,7 @@ static int nv_adma_port_start(struct ata_port *ap)
pp->cpb_dma = mem_dma;

writel(mem_dma & 0xFFFFFFFF, mmio + NV_ADMA_CPB_BASE_LOW);
writel((mem_dma >> 16 ) >> 16, mmio + NV_ADMA_CPB_BASE_HIGH);
writel((mem_dma >> 16) >> 16, mmio + NV_ADMA_CPB_BASE_HIGH);

mem += NV_ADMA_MAX_CPBS * NV_ADMA_CPB_SZ;
mem_dma += NV_ADMA_MAX_CPBS * NV_ADMA_CPB_SZ;
Expand All @@ -1189,15 +1190,15 @@ static int nv_adma_port_start(struct ata_port *ap)

/* clear GO for register mode, enable interrupt */
tmp = readw(mmio + NV_ADMA_CTL);
writew( (tmp & ~NV_ADMA_CTL_GO) | NV_ADMA_CTL_AIEN |
NV_ADMA_CTL_HOTPLUG_IEN, mmio + NV_ADMA_CTL);
writew((tmp & ~NV_ADMA_CTL_GO) | NV_ADMA_CTL_AIEN |
NV_ADMA_CTL_HOTPLUG_IEN, mmio + NV_ADMA_CTL);

tmp = readw(mmio + NV_ADMA_CTL);
writew(tmp | NV_ADMA_CTL_CHANNEL_RESET, mmio + NV_ADMA_CTL);
readw(mmio + NV_ADMA_CTL ); /* flush posted write */
readw(mmio + NV_ADMA_CTL); /* flush posted write */
udelay(1);
writew(tmp & ~NV_ADMA_CTL_CHANNEL_RESET, mmio + NV_ADMA_CTL);
readw(mmio + NV_ADMA_CTL ); /* flush posted write */
readw(mmio + NV_ADMA_CTL); /* flush posted write */

return 0;
}
Expand Down Expand Up @@ -1237,7 +1238,7 @@ static int nv_adma_port_resume(struct ata_port *ap)

/* set CPB block location */
writel(pp->cpb_dma & 0xFFFFFFFF, mmio + NV_ADMA_CPB_BASE_LOW);
writel((pp->cpb_dma >> 16 ) >> 16, mmio + NV_ADMA_CPB_BASE_HIGH);
writel((pp->cpb_dma >> 16) >> 16, mmio + NV_ADMA_CPB_BASE_HIGH);

/* clear any outstanding interrupt conditions */
writew(0xffff, mmio + NV_ADMA_STAT);
Expand All @@ -1250,15 +1251,15 @@ static int nv_adma_port_resume(struct ata_port *ap)

/* clear GO for register mode, enable interrupt */
tmp = readw(mmio + NV_ADMA_CTL);
writew( (tmp & ~NV_ADMA_CTL_GO) | NV_ADMA_CTL_AIEN |
NV_ADMA_CTL_HOTPLUG_IEN, mmio + NV_ADMA_CTL);
writew((tmp & ~NV_ADMA_CTL_GO) | NV_ADMA_CTL_AIEN |
NV_ADMA_CTL_HOTPLUG_IEN, mmio + NV_ADMA_CTL);

tmp = readw(mmio + NV_ADMA_CTL);
writew(tmp | NV_ADMA_CTL_CHANNEL_RESET, mmio + NV_ADMA_CTL);
readw(mmio + NV_ADMA_CTL ); /* flush posted write */
readw(mmio + NV_ADMA_CTL); /* flush posted write */
udelay(1);
writew(tmp & ~NV_ADMA_CTL_CHANNEL_RESET, mmio + NV_ADMA_CTL);
readw(mmio + NV_ADMA_CTL ); /* flush posted write */
readw(mmio + NV_ADMA_CTL); /* flush posted write */

return 0;
}
Expand Down Expand Up @@ -1342,7 +1343,8 @@ static void nv_adma_fill_sg(struct ata_queued_cmd *qc, struct nv_adma_cpb *cpb)
idx = 0;

ata_for_each_sg(sg, qc) {
aprd = (idx < 5) ? &cpb->aprd[idx] : &pp->aprd[NV_ADMA_SGTBL_LEN * qc->tag + (idx-5)];
aprd = (idx < 5) ? &cpb->aprd[idx] :
&pp->aprd[NV_ADMA_SGTBL_LEN * qc->tag + (idx-5)];
nv_adma_fill_aprd(qc, sg, idx, aprd);
idx++;
}
Expand Down Expand Up @@ -1407,8 +1409,8 @@ static void nv_adma_qc_prep(struct ata_queued_cmd *qc)
} else
memset(&cpb->aprd[0], 0, sizeof(struct nv_adma_prd) * 5);

/* Be paranoid and don't let the device see NV_CPB_CTL_CPB_VALID until we are
finished filling in all of the contents */
/* Be paranoid and don't let the device see NV_CPB_CTL_CPB_VALID
until we are finished filling in all of the contents */
wmb();
cpb->ctl_flags = ctl_flags;
wmb();
Expand Down Expand Up @@ -1436,15 +1438,15 @@ static unsigned int nv_adma_qc_issue(struct ata_queued_cmd *qc)
wmb();

if (curr_ncq != pp->last_issue_ncq) {
/* Seems to need some delay before switching between NCQ and non-NCQ
commands, else we get command timeouts and such. */
/* Seems to need some delay before switching between NCQ and
non-NCQ commands, else we get command timeouts and such. */
udelay(20);
pp->last_issue_ncq = curr_ncq;
}

writew(qc->tag, mmio + NV_ADMA_APPEND);

DPRINTK("Issued tag %u\n",qc->tag);
DPRINTK("Issued tag %u\n", qc->tag);

return 0;
}
Expand Down Expand Up @@ -1654,7 +1656,8 @@ static void nv_adma_error_handler(struct ata_port *ap)
u8 cpb_count = readb(mmio + NV_ADMA_CPB_COUNT);
u8 next_cpb_idx = readb(mmio + NV_ADMA_NEXT_CPB_IDX);

ata_port_printk(ap, KERN_ERR, "EH in ADMA mode, notifier 0x%X "
ata_port_printk(ap, KERN_ERR,
"EH in ADMA mode, notifier 0x%X "
"notifier_error 0x%X gen_ctl 0x%X status 0x%X "
"next cpb count 0x%X next cpb idx 0x%x\n",
notifier, notifier_error, gen_ctl, status,
Expand All @@ -1663,7 +1666,7 @@ static void nv_adma_error_handler(struct ata_port *ap)
for (i = 0; i < NV_ADMA_MAX_CPBS; i++) {
struct nv_adma_cpb *cpb = &pp->cpb[i];
if ((ata_tag_valid(ap->link.active_tag) && i == ap->link.active_tag) ||
ap->link.sactive & (1 << i) )
ap->link.sactive & (1 << i))
ata_port_printk(ap, KERN_ERR,
"CPB %d: ctl_flags 0x%x, resp_flags 0x%x\n",
i, cpb->ctl_flags, cpb->resp_flags);
Expand All @@ -1673,7 +1676,8 @@ static void nv_adma_error_handler(struct ata_port *ap)
/* Push us back into port register mode for error handling. */
nv_adma_register_mode(ap);

/* Mark all of the CPBs as invalid to prevent them from being executed */
/* Mark all of the CPBs as invalid to prevent them from
being executed */
for (i = 0; i < NV_ADMA_MAX_CPBS; i++)
pp->cpb[i].ctl_flags &= ~NV_CPB_CTL_CPB_VALID;

Expand Down Expand Up @@ -2350,9 +2354,9 @@ static irqreturn_t nv_swncq_interrupt(int irq, void *dev_instance)
return IRQ_RETVAL(handled);
}

static int nv_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
static int nv_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
{
static int printed_version = 0;
static int printed_version;
const struct ata_port_info *ppi[] = { NULL, NULL };
struct ata_host *host;
struct nv_host_priv *hpriv;
Expand All @@ -2364,7 +2368,7 @@ static int nv_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
// Make sure this is a SATA controller by counting the number of bars
// (NVIDIA SATA controllers will always have six bars). Otherwise,
// it's an IDE controller and we ignore it.
for (bar=0; bar<6; bar++)
for (bar = 0; bar < 6; bar++)
if (pci_resource_start(pdev, bar) == 0)
return -ENODEV;

Expand Down Expand Up @@ -2460,17 +2464,17 @@ static int nv_pci_device_resume(struct pci_dev *pdev)
pp = host->ports[0]->private_data;
if (pp->flags & NV_ADMA_ATAPI_SETUP_COMPLETE)
tmp32 &= ~(NV_MCP_SATA_CFG_20_PORT0_EN |
NV_MCP_SATA_CFG_20_PORT0_PWB_EN);
NV_MCP_SATA_CFG_20_PORT0_PWB_EN);
else
tmp32 |= (NV_MCP_SATA_CFG_20_PORT0_EN |
NV_MCP_SATA_CFG_20_PORT0_PWB_EN);
NV_MCP_SATA_CFG_20_PORT0_PWB_EN);
pp = host->ports[1]->private_data;
if (pp->flags & NV_ADMA_ATAPI_SETUP_COMPLETE)
tmp32 &= ~(NV_MCP_SATA_CFG_20_PORT1_EN |
NV_MCP_SATA_CFG_20_PORT1_PWB_EN);
NV_MCP_SATA_CFG_20_PORT1_PWB_EN);
else
tmp32 |= (NV_MCP_SATA_CFG_20_PORT1_EN |
NV_MCP_SATA_CFG_20_PORT1_PWB_EN);
NV_MCP_SATA_CFG_20_PORT1_PWB_EN);

pci_write_config_dword(pdev, NV_MCP_SATA_CFG_20, tmp32);
}
Expand Down
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