arch/riscv: remove the Kconfig.core file

This commit removes the `Kconfig.core` file. It's been largely unused, and the only symbol it provides (`RISCV_CORE_E31`) overlaps with the SoC-layer provided `SOC_SERIES_SIFIVE_FREEDOM_FE300`. As of date, the only SoC that uses the E31 core in Zephyr is the FE310 SoC. Signed-off-by: Filip Kokosinski <[email protected]>
grevaillot · Apr 5, 2024 · ab84989 · ab84989
1 parent 4c45884
commit ab84989
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Showing 5 changed files with 3 additions and 25 deletions.
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
@@ -374,6 +374,5 @@ config ARCH_HAS_SINGLE_THREAD_SUPPORT
 	default y if !SMP
 
 rsource "Kconfig.isa"
-rsource "Kconfig.core"
 
 endmenu
diff --git a/arch/riscv/Kconfig.core b/arch/riscv/Kconfig.core
diff --git a/boards/qemu/riscv32_xip/qemu_riscv32_xip_defconfig b/boards/qemu/riscv32_xip/qemu_riscv32_xip_defconfig
@@ -8,4 +8,3 @@ CONFIG_PINCTRL=y
 CONFIG_GPIO=y
 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=10000000
 CONFIG_QEMU_ICOUNT_SHIFT=6
-CONFIG_RISCV_CORE_E31=y
diff --git a/boards/sifive/hifive1/Kconfig b/boards/sifive/hifive1/Kconfig
diff --git a/soc/sifive/sifive_freedom/fe300/Kconfig b/soc/sifive/sifive_freedom/fe300/Kconfig
@@ -9,9 +9,12 @@ config SOC_SERIES_SIFIVE_FREEDOM_FE300
 	select RISCV
 	select RISCV_PRIVILEGED
 	select RISCV_HAS_PLIC
+	select RISCV_PMP
+
 	select RISCV_ISA_RV32I
 	select RISCV_ISA_EXT_M
 	select RISCV_ISA_EXT_A
+	select RISCV_ISA_EXT_C
 	select RISCV_ISA_EXT_ZICSR
 	select RISCV_ISA_EXT_ZIFENCEI