Merge git://git.denx.de/u-boot-riscv

grygoriyS · Mar 30, 2018 · 0ca0a54 · 0ca0a54
2 parents 2476d26 + d58717e
commit 0ca0a54
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Showing 33 changed files with 347 additions and 594 deletions.
diff --git a/arch/nds32/dts/ag101p.dts b/arch/nds32/dts/ag101p.dts
@@ -67,5 +67,6 @@
 		fifo-depth = <0x10>;
 		reg = <0x98e00000 0x1000>;
 		interrupts = <5 4>;
+		cap-sd-highspeed;
 	};
 };
diff --git a/arch/nds32/include/asm/arch-ae3xx/ae3xx.h b/arch/nds32/include/asm/arch-ae3xx/ae3xx.h
@@ -44,8 +44,6 @@
 #define CONFIG_FTGPIO010_BASE		0xf0700000
 /* I2C */
 #define CONFIG_FTIIC010_BASE		0xf0a00000
-/* SD Controller */
-#define CONFIG_FTSDC010_BASE		0xf0e00000
 
 /* The following address was not defined in Linux */
 

diff --git a/arch/nds32/include/asm/arch-ag101/ag101.h b/arch/nds32/include/asm/arch-ag101/ag101.h
@@ -69,8 +69,6 @@
 #define CONFIG_RESERVED_04_BASE		0x98C00000
 /* Compat Flash Controller */
 #define CONFIG_FTCFC010_BASE		0x98D00000
-/* SD Controller */
-#define CONFIG_FTSDC010_BASE		0x98E00000
 
 /* Synchronous Serial Port Controller (SSP) I2S/AC97 */
 #define CONFIG_FTSSP010_02_BASE		0x99400000

diff --git a/arch/nds32/include/asm/arch-ag102/ag102.h b/arch/nds32/include/asm/arch-ag102/ag102.h
@@ -56,8 +56,6 @@
 #define CONFIG_FTSSP010_01_BASE		0x94100000
 /* UART1 - APB STUART Controller (UART0 in Linux) */
 #define CONFIG_FTUART010_01_BASE	0x94200000
-/* FTSDC010 SD Controller */
-#define CONFIG_FTSDC010_BASE		0x94400000
 /* APB - SSP with HDA/AC97 Controller */
 #define CONFIG_FTSSP010_02_BASE		0x94500000
 /* UART2 - APB STUART Controller (UART1 in Linux) */

diff --git a/arch/riscv/cpu/nx25/start.S b/arch/riscv/cpu/nx25/start.S
@@ -45,6 +45,8 @@ trap_vector:
 
 .global trap_entry
 handle_reset:
+	li t0, CONFIG_SYS_SDRAM_BASE
+	SREG a2, 0(t0)
 	la t0, trap_entry
 	csrw mtvec, t0
 	csrwi mstatus, 0

diff --git a/arch/riscv/dts/ae250.dts b/arch/riscv/dts/ae250.dts
@@ -74,6 +74,7 @@
 		fifo-depth = <0x10>;
 		reg = <0xf0e00000 0x1000>;
 		interrupts = <17 4>;
+		cap-sd-highspeed;
 	};
 
 	spi: spi@f0b00000 {

diff --git a/arch/riscv/include/asm/bootm.h b/arch/riscv/include/asm/bootm.h
@@ -13,53 +13,4 @@
 
 #include <asm/setup.h>
 
-#if defined(CONFIG_SETUP_MEMORY_TAGS) || \
-		defined(CONFIG_CMDLINE_TAG) || \
-		defined(CONFIG_INITRD_TAG) || \
-		defined(CONFIG_SERIAL_TAG) || \
-		defined(CONFIG_REVISION_TAG)
-# define BOOTM_ENABLE_TAGS		1
-#else
-# define BOOTM_ENABLE_TAGS		0
-#endif
-
-#ifdef CONFIG_SETUP_MEMORY_TAGS
-# define BOOTM_ENABLE_MEMORY_TAGS	1
-#else
-# define BOOTM_ENABLE_MEMORY_TAGS	0
-#endif
-
-#ifdef CONFIG_CMDLINE_TAG
- #define BOOTM_ENABLE_CMDLINE_TAG	1
-#else
- #define BOOTM_ENABLE_CMDLINE_TAG	0
-#endif
-
-#ifdef CONFIG_INITRD_TAG
- #define BOOTM_ENABLE_INITRD_TAG	1
-#else
- #define BOOTM_ENABLE_INITRD_TAG	0
-#endif
-
-#ifdef CONFIG_SERIAL_TAG
- #define BOOTM_ENABLE_SERIAL_TAG	1
-void get_board_serial(struct tag_serialnr *serialnr);
-#else
- #define BOOTM_ENABLE_SERIAL_TAG	0
-static inline void get_board_serial(struct tag_serialnr *serialnr)
-{
-}
-#endif
-
-#ifdef CONFIG_REVISION_TAG
- #define BOOTM_ENABLE_REVISION_TAG	1
-u32 get_board_rev(void);
-#else
- #define BOOTM_ENABLE_REVISION_TAG	0
-static inline u32 get_board_rev(void)
-{
-	return 0;
-}
-#endif
-
 #endif
diff --git a/arch/riscv/include/asm/encoding.h b/arch/riscv/include/asm/encoding.h
@@ -121,7 +121,9 @@
 #define PTE_SW(PTE)	((0x88888880U >> ((PTE) & 0x1F)) & 1)
 #define PTE_SX(PTE)	((0xA0A0A000U >> ((PTE) & 0x1F)) & 1)
 
-#define PTE_CHECK_PERM(PTE, SUPERVISOR, STORE, FETCH) \
+#define PTE_CHECK_PERM(_PTE, _SUPERVISOR, STORE, FETCH) \
+	typeof(_PTE) (PTE) = (_PTE); \
+	typeof(_SUPERVISOR) (SUPERVISOR) = (_SUPERVISOR); \
 	((STORE) ? ((SUPERVISOR) ? PTE_SW(PTE) : PTE_UW(PTE)) : \
 	(FETCH) ? ((SUPERVISOR) ? PTE_SX(PTE) : PTE_UX(PTE)) : \
 	((SUPERVISOR) ? PTE_SR(PTE) : PTE_UR(PTE)))
@@ -151,27 +153,31 @@
 	asm volatile ("csrr %0, " #reg : "=r"(__tmp)); \
 	__tmp; })
 
-#define write_csr(reg, val) ({ \
+#define write_csr(reg, _val) ({ \
+typeof(_val) (val) = (_val); \
 if (__builtin_constant_p(val) && (unsigned long)(val) < 32) \
 	asm volatile ("csrw " #reg ", %0" :: "i"(val)); \
 else \
 	asm volatile ("csrw " #reg ", %0" :: "r"(val)); })
 
-#define swap_csr(reg, val) ({ unsigned long __tmp; \
+#define swap_csr(reg, _val) ({ unsigned long __tmp; \
+typeof(_val) (val) = (_val); \
 if (__builtin_constant_p(val) && (unsigned long)(val) < 32) \
 	asm volatile ("csrrw %0, " #reg ", %1" : "=r"(__tmp) : "i"(val)); \
 else \
 	asm volatile ("csrrw %0, " #reg ", %1" : "=r"(__tmp) : "r"(val)); \
 	__tmp; })
 
-#define set_csr(reg, bit) ({ unsigned long __tmp; \
+#define set_csr(reg, _bit) ({ unsigned long __tmp; \
+typeof(_bit) (bit) = (_bit); \
 if (__builtin_constant_p(bit) && (unsigned long)(bit) < 32) \
 	asm volatile ("csrrs %0, " #reg ", %1" : "=r"(__tmp) : "i"(bit)); \
 else \
 	asm volatile ("csrrs %0, " #reg ", %1" : "=r"(__tmp) : "r"(bit)); \
 	__tmp; })
 
-#define clear_csr(reg, bit) ({ unsigned long __tmp; \
+#define clear_csr(reg, _bit) ({ unsigned long __tmp; \
+typeof(_bit) (bit) = (_bit); \
 if (__builtin_constant_p(bit) && (unsigned long)(bit) < 32) \
 	asm volatile ("csrrc %0, " #reg ", %1" : "=r"(__tmp) : "i"(bit)); \
 else \

diff --git a/arch/riscv/include/asm/global_data.h b/arch/riscv/include/asm/global_data.h
@@ -17,6 +17,6 @@ struct arch_global_data {
 
 #include <asm-generic/global_data.h>
 
-#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("gp")
+#define DECLARE_GLOBAL_DATA_PTR register gd_t *gd asm ("gp")
 
 #endif /* __ASM_GBL_DATA_H */
diff --git a/arch/riscv/include/asm/io.h b/arch/riscv/include/asm/io.h
@@ -416,19 +416,17 @@ static inline void writesl(unsigned int *addr, const void *data, int longlen)
 #define eth_io_copy_and_sum(s, c, l, b) \
 	eth_copy_and_sum((s), __mem_pci(c), (l), (b))
 
-static inline int
-check_signature(unsigned long io_addr, const unsigned char *signature,
-		  int length)
+static inline int check_signature(ulong io_addr, const uchar *s, int len)
 {
 	int retval = 0;
 
 	do {
-		if (readb(io_addr) != *signature)
+		if (readb(io_addr) != *s)
 			goto out;
 		io_addr++;
-		signature++;
-		length--;
-	} while (length);
+		s++;
+		len--;
+	} while (len);
 	retval = 1;
 out:
 	return retval;
@@ -455,18 +453,17 @@ check_signature(unsigned long io_addr, const unsigned char *signature,
 	eth_copy_and_sum((a), __mem_isa(b), (c), (d))
 
 static inline int
-isa_check_signature(unsigned long io_addr, const unsigned char *signature,
-		       int length)
+isa_check_signature(ulong io_addr, const uchar *s, int len)
 {
 	int retval = 0;
 
 	do {
-		if (isa_readb(io_addr) != *signature)
+		if (isa_readb(io_addr) != *s)
 			goto out;
 		io_addr++;
-		signature++;
-		length--;
-	} while (length);
+		s++;
+		len--;
+	} while (len);
 	retval = 1;
 out:
 	return retval;

diff --git a/arch/riscv/include/asm/posix_types.h b/arch/riscv/include/asm/posix_types.h
@@ -69,19 +69,23 @@ typedef struct {
 #if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2)
 
 #undef	__FD_SET
-#define __FD_SET(fd, fdsetp) \
+#define __FD_SET(_fd, fdsetp) \
+	typeof(_fd) (fd) = (_fd); \
 	(((fd_set *)fdsetp)->fds_bits[fd >> 5] |= (1 << (fd & 31)))
 
 #undef	__FD_CLR
-#define __FD_CLR(fd, fdsetp) \
+#define __FD_CLR(_fd, fdsetp) \
+	typeof(_fd) (fd) = (_fd); \
 	(((fd_set *)fdsetp)->fds_bits[fd >> 5] &= ~(1 << (fd & 31)))
 
 #undef	__FD_ISSET
-#define __FD_ISSET(fd, fdsetp) \
+#define __FD_ISSET(_fd, fdsetp) \
+	typeof(_fd) (fd) = (_fd); \
 	((((fd_set *)fdsetp)->fds_bits[fd >> 5] & (1 << (fd & 31))) != 0)
 
 #undef	__FD_ZERO
-#define __FD_ZERO(fdsetp) \
+#define __FD_ZERO(_fdsetp) \
+	typeof(_fdsetp) (fd) = (_fdsetp); \
 	(memset(fdsetp, 0, sizeof(*(fd_set *)fdsetp)))
 
 #endif

diff --git a/arch/riscv/include/asm/ptrace.h b/arch/riscv/include/asm/ptrace.h
@@ -65,8 +65,7 @@ static inline unsigned long instruction_pointer(struct pt_regs *regs)
 	return GET_IP(regs);
 }
 
-static inline void instruction_pointer_set(struct pt_regs *regs,
-					     unsigned long val)
+static inline void instruction_pointer_set(struct pt_regs *regs, ulong val)
 {
 	SET_IP(regs, val);
 }
@@ -82,8 +81,7 @@ static inline unsigned long user_stack_pointer(struct pt_regs *regs)
 	return GET_USP(regs);
 }
 
-static inline void user_stack_pointer_set(struct pt_regs *regs,
-					     unsigned long val)
+static inline void user_stack_pointer_set(struct pt_regs *regs, ulong val)
 {
 	SET_USP(regs, val);
 }
@@ -97,8 +95,7 @@ static inline unsigned long frame_pointer(struct pt_regs *regs)
 	return GET_FP(regs);
 }
 
-static inline void frame_pointer_set(struct pt_regs *regs,
-				       unsigned long val)
+static inline void frame_pointer_set(struct pt_regs *regs, ulong val)
 {
 	SET_FP(regs, val);
 }

diff --git a/arch/riscv/include/asm/setup.h b/arch/riscv/include/asm/setup.h
@@ -145,14 +145,18 @@ struct tagtable {
 	int (*parse)(const struct tag *);
 };
 
-#define tag_member_present(tag, member)				\
+#define tag_member_present(_tag, member)				\
+	typeof(_tag) (tag) = (_tag); \
 	((unsigned long)(&((struct tag *)0L)->member + 1)	\
 		<= (tag)->hdr.size * 4)
 
-#define tag_next(t)	((struct tag *)((u32 *)(t) + (t)->hdr.size))
+#define tag_next(_t)	\
+	typeof(_t) (t) = (_t); \
+	((struct tag *)((u32 *)(t) + (t)->hdr.size))
 #define tag_size(type)	((sizeof(struct tag_header) + sizeof(struct type)) >> 2)
 
-#define for_each_tag(t, base) \
+#define for_each_tag(_t, base) \
+	typeof(_t) (t) = (_t); \
 	for (t = base; t->hdr.size; t = tag_next(t))
 
 #ifdef __KERNEL__

diff --git a/arch/riscv/include/asm/string.h b/arch/riscv/include/asm/string.h
@@ -26,8 +26,11 @@
 #undef __HAVE_ARCH_MEMSET
 
 #ifdef CONFIG_MARCO_MEMSET
-#define memset(p, v, n)							\
-	({								\
+#define memset(_p, _v, _n)	\
+	(typeof(_p) (p) = (_p); \
+	 typeof(_v) (v) = (_v); \
+	 typeof(_n) (n) = (_n); \
+	 {								\
 		if ((n) != 0) {						\
 			if (__builtin_constant_p((v)) && (v) == 0)	\
 				__memzero((p), (n));			\
@@ -37,7 +40,10 @@
 		(p);							\
 	})
 
-#define memzero(p, n) ({ if ((n) != 0) __memzero((p), (n)); (p); })
+#define memzero(_p, _n) \
+	(typeof(_p) (p) = (_p); \
+	 typeof(_n) (n) = (_n); \
+	 { if ((n) != 0) __memzero((p), (n)); (p); })
 #endif
 
 #endif /* __ASM_RISCV_STRING_H */