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[chore]: Formatting
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@batconjurer
batconjurer committed Jan 31, 2022
1 parent d42ec57 commit 17d4105
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Showing 3 changed files with 52 additions and 29 deletions.
67 changes: 44 additions & 23 deletions lib/compiler-singlepass/src/emitter_x64.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -5,9 +5,7 @@ pub use crate::machine::{Label, Offset};
use crate::machine_x64::AssemblerX64;
pub use crate::x64_decl::{GPR, XMM};
use dynasm::dynasm;
use dynasmrt::{
AssemblyOffset, DynamicLabel, DynasmApi, DynasmLabelApi,
};
use dynasmrt::{AssemblyOffset, DynamicLabel, DynasmApi, DynasmLabelApi};
use wasmer_compiler::CpuFeature;

/// Force `dynasm!` to use the correct arch (x64) when cross-compiling.
Expand Down Expand Up @@ -129,7 +127,6 @@ pub trait EmitterX64 {
fn emit_vxorps(&mut self, src1: XMM, src2: XMMOrMemory, dst: XMM);
fn emit_vxorpd(&mut self, src1: XMM, src2: XMMOrMemory, dst: XMM);


fn emit_vaddss(&mut self, src1: XMM, src2: XMMOrMemory, dst: XMM);
fn emit_vaddsd(&mut self, src1: XMM, src2: XMMOrMemory, dst: XMM);
fn emit_vsubss(&mut self, src1: XMM, src2: XMMOrMemory, dst: XMM);
Expand Down Expand Up @@ -506,7 +503,7 @@ fn move_src_to_dst(emitter: &mut AssemblerX64, precision: Precision, src: XMM, d
XMM::XMM13 => dynasm!(emitter ; movss Rx((dst as u8)), xmm13),
XMM::XMM14 => dynasm!(emitter ; movss Rx((dst as u8)), xmm14),
XMM::XMM15 => dynasm!(emitter ; movss Rx((dst as u8)), xmm15),
}
},
Precision::Double => match src {
XMM::XMM0 => dynasm!(emitter ; movsd Rx((dst as u8)), xmm0),
XMM::XMM1 => dynasm!(emitter ; movsd Rx((dst as u8)), xmm1),
Expand All @@ -524,7 +521,7 @@ fn move_src_to_dst(emitter: &mut AssemblerX64, precision: Precision, src: XMM, d
XMM::XMM13 => dynasm!(emitter ; movsd Rx((dst as u8)), xmm13),
XMM::XMM14 => dynasm!(emitter ; movsd Rx((dst as u8)), xmm14),
XMM::XMM15 => dynasm!(emitter ; movsd Rx((dst as u8)), xmm15),
}
},
}
}

Expand Down Expand Up @@ -1397,7 +1394,7 @@ impl EmitterX64 for AssemblerX64 {
_ => panic!("singlepass can't emit VMOVAPD {:?} {:?}", src, dst),
};
}
fn emit_vxorps(&mut self, src1: XMM, src2: XMMOrMemory, dst: XMM) {
fn emit_vxorps(&mut self, src1: XMM, src2: XMMOrMemory, dst: XMM) {
match self.get_simd_arch() {
Some(CpuFeature::AVX) => avx_fn!(vxorps)(self, src1, src2, dst),
Some(CpuFeature::SSE42) => sse_fn!(xorps)(self, Precision::Single, src1, src2, dst),
Expand Down Expand Up @@ -1638,84 +1635,108 @@ impl EmitterX64 for AssemblerX64 {
fn emit_vroundss_nearest(&mut self, src1: XMM, src2: XMMOrMemory, dst: XMM) {
match self.get_simd_arch() {
Some(CpuFeature::AVX) => avx_round_fn!(vroundss, 0)(self, src1, src2, dst),
Some(CpuFeature::SSE42) => sse_round_fn!(roundss, 0)(self, Precision::Single, src1, src2, dst),
Some(CpuFeature::SSE42) => {
sse_round_fn!(roundss, 0)(self, Precision::Single, src1, src2, dst)
}
_ => {}
}
}
fn emit_vroundsd_nearest(&mut self, src1: XMM, src2: XMMOrMemory, dst: XMM) {
match self.get_simd_arch() {
Some(CpuFeature::AVX) => avx_round_fn!(vroundsd, 0)(self, src1, src2, dst),
Some(CpuFeature::SSE42) => sse_round_fn!(roundsd, 0)(self, Precision::Double, src1, src2, dst),
Some(CpuFeature::SSE42) => {
sse_round_fn!(roundsd, 0)(self, Precision::Double, src1, src2, dst)
}
_ => {}
}
}
fn emit_vroundss_floor(&mut self, src1: XMM, src2: XMMOrMemory, dst: XMM) {
match self.get_simd_arch() {
Some(CpuFeature::AVX) => avx_round_fn!(vroundss, 1)(self, src1, src2, dst),
Some(CpuFeature::SSE42) => sse_round_fn!(roundss, 1)(self, Precision::Single, src1, src2, dst),
Some(CpuFeature::SSE42) => {
sse_round_fn!(roundss, 1)(self, Precision::Single, src1, src2, dst)
}
_ => {}
}
}
fn emit_vroundsd_floor(&mut self, src1: XMM, src2: XMMOrMemory, dst: XMM) {
match self.get_simd_arch() {
Some(CpuFeature::AVX) => avx_round_fn!(vroundsd, 1)(self, src1, src2, dst),
Some(CpuFeature::SSE42) => sse_round_fn!(roundsd, 1)(self, Precision::Double, src1, src2, dst),
Some(CpuFeature::SSE42) => {
sse_round_fn!(roundsd, 1)(self, Precision::Double, src1, src2, dst)
}
_ => {}
}
}
fn emit_vroundss_ceil(&mut self, src1: XMM, src2: XMMOrMemory, dst: XMM) {
match self.get_simd_arch() {
Some(CpuFeature::AVX) => avx_round_fn!(vroundss, 2)(self, src1, src2, dst),
Some(CpuFeature::SSE42) => sse_round_fn!(roundss, 2)(self, Precision::Single, src1, src2, dst),
Some(CpuFeature::SSE42) => {
sse_round_fn!(roundss, 2)(self, Precision::Single, src1, src2, dst)
}
_ => {}
}
}
fn emit_vroundsd_ceil(&mut self, src1: XMM, src2: XMMOrMemory, dst: XMM) {
match self.get_simd_arch() {
Some(CpuFeature::AVX) => avx_round_fn!(vroundsd, 2)(self, src1, src2, dst),
Some(CpuFeature::SSE42) => sse_round_fn!(roundsd, 2)(self, Precision::Double, src1, src2, dst),
Some(CpuFeature::SSE42) => {
sse_round_fn!(roundsd, 2)(self, Precision::Double, src1, src2, dst)
}
_ => {}
}
}
fn emit_vroundss_trunc(&mut self, src1: XMM, src2: XMMOrMemory, dst: XMM) {
match self.get_simd_arch() {
Some(CpuFeature::AVX) => avx_round_fn!(vroundss, 3)(self, src1, src2, dst),
Some(CpuFeature::SSE42) => sse_round_fn!(roundss, 3)(self, Precision::Single, src1, src2, dst),
Some(CpuFeature::SSE42) => {
sse_round_fn!(roundss, 3)(self, Precision::Single, src1, src2, dst)
}
_ => {}
}
}
fn emit_vroundsd_trunc(&mut self, src1: XMM, src2: XMMOrMemory, dst: XMM) {
match self.get_simd_arch() {
Some(CpuFeature::AVX) => avx_round_fn!(vroundsd, 3)(self, src1, src2, dst),
Some(CpuFeature::SSE42) => sse_round_fn!(roundsd, 3)(self, Precision::Double, src1, src2, dst),
Some(CpuFeature::SSE42) => {
sse_round_fn!(roundsd, 3)(self, Precision::Double, src1, src2, dst)
}
_ => {}
}
}
fn emit_vcvtsi2ss_32(&mut self, src1: XMM, src2: GPROrMemory, dst: XMM) {
match self.get_simd_arch() {
Some(CpuFeature::AVX) => avx_i2f_32_fn!(vcvtsi2ss)(self, src1, src2, dst),
Some(CpuFeature::SSE42) => sse_i2f_32_fn!(cvtsi2ss)(self, Precision::Single, src1, src2, dst),
Some(CpuFeature::SSE42) => {
sse_i2f_32_fn!(cvtsi2ss)(self, Precision::Single, src1, src2, dst)
}
_ => {}
}
}
fn emit_vcvtsi2sd_32(&mut self, src1: XMM, src2: GPROrMemory, dst: XMM) {
match self.get_simd_arch() {
Some(CpuFeature::AVX) => avx_i2f_32_fn!(vcvtsi2sd)(self, src1, src2, dst),
Some(CpuFeature::SSE42) => sse_i2f_32_fn!(cvtsi2sd)(self, Precision::Double, src1, src2, dst),
Some(CpuFeature::SSE42) => {
sse_i2f_32_fn!(cvtsi2sd)(self, Precision::Double, src1, src2, dst)
}
_ => {}
}
}
fn emit_vcvtsi2ss_64(&mut self, src1: XMM, src2: GPROrMemory, dst: XMM) {
match self.get_simd_arch() {
Some(CpuFeature::AVX) => avx_i2f_64_fn!(vcvtsi2ss)(self, src1, src2, dst),
Some(CpuFeature::SSE42) => sse_i2f_64_fn!(cvtsi2ss)(self, Precision::Single, src1, src2, dst),
Some(CpuFeature::SSE42) => {
sse_i2f_64_fn!(cvtsi2ss)(self, Precision::Single, src1, src2, dst)
}
_ => {}
}
}
fn emit_vcvtsi2sd_64(&mut self, src1: XMM, src2: GPROrMemory, dst: XMM) {
match self.get_simd_arch() {
Some(CpuFeature::AVX) => avx_i2f_64_fn!(vcvtsi2sd)(self, src1, src2, dst),
Some(CpuFeature::SSE42) => sse_i2f_64_fn!(cvtsi2sd)(self, Precision::Double, src1, src2, dst),
Some(CpuFeature::SSE42) => {
sse_i2f_64_fn!(cvtsi2sd)(self, Precision::Double, src1, src2, dst)
}
_ => {}
}
}
Expand All @@ -1731,7 +1752,7 @@ impl EmitterX64 for AssemblerX64 {
XMMOrMemory::Memory(base, disp) => {
dynasm!( self; vblendvps Rx(dst as u8), Rx(mask as u8), [Rq(base as u8) + disp], Rx(src1 as u8))
}
}
},
Some(CpuFeature::SSE42) => match src2 {
XMMOrMemory::XMM(src2) => {
move_src_to_dst(self, Precision::Single, src1, dst);
Expand All @@ -1741,7 +1762,7 @@ impl EmitterX64 for AssemblerX64 {
move_src_to_dst(self, Precision::Single, src1, dst);
dynasm!( self; blendvps Rx(dst as u8), [Rq(base as u8) + disp])
}
}
},
_ => {}
}
}
Expand All @@ -1757,7 +1778,7 @@ impl EmitterX64 for AssemblerX64 {
XMMOrMemory::Memory(base, disp) => {
dynasm!( self; vblendvpd Rx(dst as u8), Rx(mask as u8), [Rq(base as u8) + disp], Rx(src1 as u8))
}
}
},
Some(CpuFeature::SSE42) => match src2 {
XMMOrMemory::XMM(src2) => {
move_src_to_dst(self, Precision::Double, src1, dst);
Expand All @@ -1767,7 +1788,7 @@ impl EmitterX64 for AssemblerX64 {
move_src_to_dst(self, Precision::Double, src1, dst);
dynasm!( self; blendvpd Rx(dst as u8), [Rq(base as u8) + disp])
}
}
},
_ => {}
}
}
Expand Down
6 changes: 4 additions & 2 deletions lib/compiler-singlepass/src/machine.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,10 @@ use std::collections::BTreeMap;
use std::fmt::Debug;
pub use wasmer_compiler::wasmparser::MemoryImmediate;
use wasmer_compiler::wasmparser::Type as WpType;
use wasmer_compiler::{Architecture, CallingConvention, CustomSection, FunctionBody, InstructionAddressMap, Relocation, RelocationTarget, Target, TrapInformation, CpuFeature};
use wasmer_compiler::{
Architecture, CallingConvention, CpuFeature, CustomSection, FunctionBody,
InstructionAddressMap, Relocation, RelocationTarget, Target, TrapInformation,
};
use wasmer_types::{FunctionIndex, FunctionType};
use wasmer_vm::{TrapCode, VMOffsets};

Expand Down Expand Up @@ -2256,7 +2259,6 @@ pub fn gen_import_call_trampoline(
Architecture::Aarch64(_) => {
let machine = MachineARM64::new();
machine.gen_import_call_trampoline(vmoffsets, index, sig, calling_convention)

}
_ => unimplemented!(),
}
Expand Down
8 changes: 4 additions & 4 deletions lib/compiler-singlepass/src/machine_x64.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -4,14 +4,14 @@ use crate::location::Location as AbstractLocation;
use crate::machine::*;
use crate::x64_decl::new_machine_state;
use crate::x64_decl::{ArgumentRegisterAllocator, X64Register, GPR, XMM};
use dynasmrt::{x64::X64Relocation, VecAssembler, DynasmError};
use dynasmrt::{x64::X64Relocation, DynasmError, VecAssembler};
use std::collections::HashSet;
use std::ops::{Deref, DerefMut};
use wasmer_compiler::wasmparser::Type as WpType;
use wasmer_compiler::{
CallingConvention, CustomSection, CustomSectionProtection,
FunctionBody, InstructionAddressMap, Relocation, RelocationKind,
RelocationTarget, SectionBody, SourceLoc, TrapInformation, CpuFeature
CallingConvention, CpuFeature, CustomSection, CustomSectionProtection, FunctionBody,
InstructionAddressMap, Relocation, RelocationKind, RelocationTarget, SectionBody, SourceLoc,
TrapInformation,
};
use wasmer_types::{FunctionIndex, FunctionType, Type};
use wasmer_vm::{TrapCode, VMOffsets};
Expand Down

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