improv(compiler) Added emit_relaxed_ldr64 utility (65 tests passes now)

gtheric · Jan 14, 2022 · 67e5f9c · 67e5f9c
1 parent ae1925e
commit 67e5f9c
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Showing 2 changed files with 37 additions and 4 deletions.
diff --git a/lib/compiler-singlepass/src/emitter_arm64.rs b/lib/compiler-singlepass/src/emitter_arm64.rs
@@ -264,6 +264,19 @@ impl EmitterARM64 for Assembler {
                 let disp = disp as u32;
                 dynasm!(self ; ldrb W(reg), [X(addr), disp]);
             }
+            (Size::S64, Location::GPR(reg), Location::Memory2(addr, r2, mult, offs)) => {
+                let reg = reg.into_index() as u32;
+                let addr = addr.into_index() as u32;
+                let r2 = r2.into_index() as u32;
+                if offs != 0 {
+                    unreachable!();
+                }
+                let mult = mult as u32;
+                if mult == 0 {
+                    unreachable!();
+                }
+                dynasm!(self ; ldr X(reg), [X(addr), X(r2), LSL mult]);
+            }
             (Size::S64, Location::SIMD(reg), Location::Memory(addr, disp)) => {
                 let reg = reg.into_index() as u32;
                 let addr = addr.into_index() as u32;

diff --git a/lib/compiler-singlepass/src/machine_arm64.rs b/lib/compiler-singlepass/src/machine_arm64.rs
@@ -132,6 +132,28 @@ impl MachineARM64 {
             self.release_gpr(r);
         }
     }
+    fn emit_relaxed_ldr64(&mut self, dst: Location, src: Location) {
+        match src {
+            Location::Memory(addr, offset) => {
+                if offset & 0x7 == 0 {
+                    self.assembler.emit_ldr(Size::S64, dst, src);
+                } else if offset > -256 && offset < 256 {
+                    self.assembler.emit_ldur(Size::S64, dst, addr, offset);
+                } else {
+                    let tmp = self.acquire_temp_gpr().unwrap();
+                    self.assembler
+                        .emit_mov_imm(Location::GPR(tmp), offset as u64);
+                    self.assembler.emit_ldr(
+                        Size::S64,
+                        Location::GPR(tmp),
+                        Location::Memory2(addr, tmp, Multiplier::One, 0),
+                    );
+                    self.release_gpr(tmp);
+                }
+            }
+            _ => unreachable!(),
+        }
+    }
     /// I32 binary operation with both operands popped from the virtual stack.
     /*fn emit_binop_i32(
         &mut self,
@@ -245,13 +267,11 @@ impl MachineARM64 {
         let tmp_bound = self.acquire_temp_gpr().unwrap();
 
         // Load base into temporary register.
-        self.assembler
-            .emit_ldr(Size::S64, Location::GPR(tmp_base), base_loc);
+        self.emit_relaxed_ldr64(Location::GPR(tmp_base), base_loc);
 
         // Load bound into temporary register, if needed.
         if need_check {
-            self.assembler
-                .emit_ldr(Size::S64, Location::GPR(tmp_bound), bound_loc);
+            self.emit_relaxed_ldr64(Location::GPR(tmp_bound), bound_loc);
 
             // Wasm -> Effective.
             // Assuming we never underflow - should always be true on Linux/macOS and Windows >=8,