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Merge tag 'xtensa-next-20130508' of git://github.com/czankel/xtensa-l…
…inux Pull xtensa updates from Chris Zankel: "Support for the latest MMU architecture that allows for a larger accessible memory region, and various bug-fixes" * tag 'xtensa-next-20130508' of git://github.com/czankel/xtensa-linux: xtensa: Switch to asm-generic/linkage.h xtensa: fix redboot load address xtensa: ISS: fix timer_lock usage in rs_open xtensa: disable IRQs while IRQ handler is running xtensa: enable lockdep support xtensa: fix arch_irqs_disabled_flags implementation xtensa: add irq flags trace support xtensa: provide custom CALLER_ADDR* implementations xtensa: add stacktrace support xtensa: clean up stpill_registers xtensa: don't use a7 in simcalls xtensa: don't attempt to use unconfigured timers xtensa: provide default platform_pcibios_init implementation xtensa: remove KCORE_ELF again xtensa: document MMUv3 setup sequence xtensa: add MMU v3 support xtensa: fix ibreakenable register update xtensa: fix oprofile building as module
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,46 @@ | ||
| MMUv3 initialization sequence. | ||
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| The code in the initialize_mmu macro sets up MMUv3 memory mapping | ||
| identically to MMUv2 fixed memory mapping. Depending on | ||
| CONFIG_INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX symbol this code is | ||
| located in one of the following address ranges: | ||
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| 0xF0000000..0xFFFFFFFF (will keep same address in MMU v2 layout; | ||
| typically ROM) | ||
| 0x00000000..0x07FFFFFF (system RAM; this code is actually linked | ||
| at 0xD0000000..0xD7FFFFFF [cached] | ||
| or 0xD8000000..0xDFFFFFFF [uncached]; | ||
| in any case, initially runs elsewhere | ||
| than linked, so have to be careful) | ||
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| The code has the following assumptions: | ||
| This code fragment is run only on an MMU v3. | ||
| TLBs are in their reset state. | ||
| ITLBCFG and DTLBCFG are zero (reset state). | ||
| RASID is 0x04030201 (reset state). | ||
| PS.RING is zero (reset state). | ||
| LITBASE is zero (reset state, PC-relative literals); required to be PIC. | ||
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||
| TLB setup proceeds along the following steps. | ||
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| Legend: | ||
| VA = virtual address (two upper nibbles of it); | ||
| PA = physical address (two upper nibbles of it); | ||
| pc = physical range that contains this code; | ||
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| After step 2, we jump to virtual address in 0x40000000..0x5fffffff | ||
| that corresponds to next instruction to execute in this code. | ||
| After step 4, we jump to intended (linked) address of this code. | ||
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||
| Step 0 Step1 Step 2 Step3 Step 4 Step5 | ||
| ============ ===== ============ ===== ============ ===== | ||
| VA PA PA VA PA PA VA PA PA | ||
| ------ -- -- ------ -- -- ------ -- -- | ||
| E0..FF -> E0 -> E0 E0..FF -> E0 F0..FF -> F0 -> F0 | ||
| C0..DF -> C0 -> C0 C0..DF -> C0 E0..EF -> F0 -> F0 | ||
| A0..BF -> A0 -> A0 A0..BF -> A0 D8..DF -> 00 -> 00 | ||
| 80..9F -> 80 -> 80 80..9F -> 80 D0..D7 -> 00 -> 00 | ||
| 60..7F -> 60 -> 60 60..7F -> 60 | ||
| 40..5F -> 40 40..5F -> pc -> pc 40..5F -> pc | ||
| 20..3F -> 20 -> 20 20..3F -> 20 | ||
| 00..1F -> 00 -> 00 00..1F -> 00 |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -1,49 +1,36 @@ | ||
| #include <variant/core.h> | ||
| /* | ||
| * linux/arch/xtensa/boot/boot-elf/boot.lds.S | ||
| * | ||
| * Copyright (C) 2008 - 2013 by Tensilica Inc. | ||
| * | ||
| * Chris Zankel <[email protected]> | ||
| * Marc Gauthier <[email protected] | ||
| * Pete Delaney <[email protected]> | ||
| * | ||
| * This program is free software; you can redistribute it and/or modify | ||
| * it under the terms of the GNU General Public License version 2 as | ||
| * published by the Free Software Foundation. | ||
| */ | ||
|
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| #include <asm/vectors.h> | ||
| OUTPUT_ARCH(xtensa) | ||
| ENTRY(_ResetVector) | ||
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| SECTIONS | ||
| { | ||
| .start 0xD0000000 : { *(.start) } | ||
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| .text 0xD0000000: | ||
| { | ||
| __reloc_start = . ; | ||
| _text_start = . ; | ||
| *(.literal .text.literal .text) | ||
| _text_end = . ; | ||
| } | ||
|
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| .rodata ALIGN(0x04): | ||
| { | ||
| *(.rodata) | ||
| *(.rodata1) | ||
| } | ||
|
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| .data ALIGN(0x04): | ||
| .ResetVector.text XCHAL_RESET_VECTOR_VADDR : | ||
| { | ||
| *(.data) | ||
| *(.data1) | ||
| *(.sdata) | ||
| *(.sdata2) | ||
| *(.got.plt) | ||
| *(.got) | ||
| *(.dynamic) | ||
| *(.ResetVector.text) | ||
| } | ||
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| __reloc_end = . ; | ||
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| . = ALIGN(0x10); | ||
| __image_load = . ; | ||
| .image 0xd0001000: | ||
| .image KERNELOFFSET: AT (LOAD_MEMORY_ADDRESS) | ||
| { | ||
| _image_start = .; | ||
| *(image) | ||
| . = (. + 3) & ~ 3; | ||
| _image_end = . ; | ||
| } | ||
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| .bss ((LOADADDR(.image) + SIZEOF(.image) + 3) & ~ 3): | ||
| { | ||
| __bss_start = .; | ||
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@@ -53,14 +40,15 @@ SECTIONS | |
| *(.bss) | ||
| __bss_end = .; | ||
| } | ||
| _end = .; | ||
| _param_start = .; | ||
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| .ResetVector.text XCHAL_RESET_VECTOR_VADDR : | ||
| /* | ||
| * This is a remapped copy of the Reset Vector Code. | ||
| * It keeps gdb in sync with the PC after switching | ||
| * to the temporary mapping used while setting up | ||
| * the V2 MMU mappings for Linux. | ||
| */ | ||
| .ResetVector.remapped_text 0x46000000 (INFO): | ||
| { | ||
| *(.ResetVector.text) | ||
| *(.ResetVector.remapped_text) | ||
| } | ||
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||
|
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| PROVIDE (end = .); | ||
| } | ||
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -1,18 +1,77 @@ | ||
| /* | ||
| * arch/xtensa/boot/boot-elf/bootstrap.S | ||
| * | ||
| * Low-level exception handling | ||
| * | ||
| * This file is subject to the terms and conditions of the GNU General Public | ||
| * License. See the file "COPYING" in the main directory of this archive | ||
| * for more details. | ||
| * | ||
| * Copyright (C) 2004 - 2013 by Tensilica Inc. | ||
| * | ||
| * Chris Zankel <[email protected]> | ||
| * Marc Gauthier <[email protected]> | ||
| * Piet Delaney <[email protected]> | ||
| */ | ||
|
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| #include <asm/bootparam.h> | ||
| #include <asm/processor.h> | ||
| #include <asm/pgtable.h> | ||
| #include <asm/page.h> | ||
| #include <asm/cacheasm.h> | ||
| #include <asm/initialize_mmu.h> | ||
| #include <linux/linkage.h> | ||
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| /* ResetVector | ||
| */ | ||
| .section .ResetVector.text, "ax" | ||
| .section .ResetVector.text, "ax" | ||
| .global _ResetVector | ||
| .global reset | ||
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| _ResetVector: | ||
| _j reset | ||
| _j _SetupMMU | ||
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| .begin no-absolute-literals | ||
| .literal_position | ||
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| .align 4 | ||
| RomInitAddr: | ||
| .word 0xd0001000 | ||
| #if defined(CONFIG_INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX) && \ | ||
| XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY | ||
| .word 0x00003000 | ||
| #else | ||
| .word 0xd0003000 | ||
| #endif | ||
| RomBootParam: | ||
| .word _bootparam | ||
| _bootparam: | ||
| .short BP_TAG_FIRST | ||
| .short 4 | ||
| .long BP_VERSION | ||
| .short BP_TAG_LAST | ||
| .short 0 | ||
| .long 0 | ||
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| .align 4 | ||
| _SetupMMU: | ||
| movi a0, 0 | ||
| wsr a0, windowbase | ||
| rsync | ||
| movi a0, 1 | ||
| wsr a0, windowstart | ||
| rsync | ||
| movi a0, 0x1F | ||
| wsr a0, ps | ||
| rsync | ||
|
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| Offset = _SetupMMU - _ResetVector | ||
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| #ifndef CONFIG_INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX | ||
| initialize_mmu | ||
| #endif | ||
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| .end no-absolute-literals | ||
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| rsil a0, XCHAL_DEBUGLEVEL-1 | ||
| rsync | ||
| reset: | ||
| l32r a0, RomInitAddr | ||
| l32r a2, RomBootParam | ||
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@@ -21,13 +80,25 @@ reset: | |
| jx a0 | ||
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| .align 4 | ||
| .section .bootstrap.data, "aw" | ||
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| .globl _bootparam | ||
| _bootparam: | ||
| .short BP_TAG_FIRST | ||
| .short 4 | ||
| .long BP_VERSION | ||
| .short BP_TAG_LAST | ||
| .short 0 | ||
| .long 0 | ||
| .section .ResetVector.remapped_text, "x" | ||
| .global _RemappedResetVector | ||
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| /* Do org before literals */ | ||
| .org 0 | ||
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| _RemappedResetVector: | ||
| .begin no-absolute-literals | ||
| .literal_position | ||
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| _j _RemappedSetupMMU | ||
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| /* Position Remapped code at the same location as the original code */ | ||
| . = _RemappedResetVector + Offset | ||
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| _RemappedSetupMMU: | ||
| #ifndef CONFIG_INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX | ||
| initialize_mmu | ||
| #endif | ||
|
|
||
| .end no-absolute-literals | ||
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