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[SystemZ] Add a check against zero before calling getTestUnderMaskCond()
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Csmith discovered that this function can be called with a zero argument,
in which case an assert for this triggered.

This patch also adds a guard before the other call to this function since
it was missing, although the test only covers the case where it was
discovered.

Reduced test case attached as CodeGen/SystemZ/int-cmp-54.ll.

Review: Ulrich Weigand

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306287 91177308-0d34-0410-b5e6-96231b3b80d8
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JonPsson committed Jun 26, 2017
1 parent b76f903 commit 018c368
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Showing 2 changed files with 22 additions and 0 deletions.
2 changes: 2 additions & 0 deletions lib/Target/SystemZ/SystemZISelLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2054,6 +2054,7 @@ static void adjustForTestUnderMask(SelectionDAG &DAG, const SDLoc &DL,
if (NewC.ICmpType != SystemZICMP::SignedOnly &&
NewC.Op0.getOpcode() == ISD::SHL &&
isSimpleShift(NewC.Op0, ShiftVal) &&
(MaskVal >> ShiftVal != 0) &&
(NewCCMask = getTestUnderMaskCond(BitSize, NewC.CCMask,
MaskVal >> ShiftVal,
CmpVal >> ShiftVal,
Expand All @@ -2063,6 +2064,7 @@ static void adjustForTestUnderMask(SelectionDAG &DAG, const SDLoc &DL,
} else if (NewC.ICmpType != SystemZICMP::SignedOnly &&
NewC.Op0.getOpcode() == ISD::SRL &&
isSimpleShift(NewC.Op0, ShiftVal) &&
(MaskVal << ShiftVal != 0) &&
(NewCCMask = getTestUnderMaskCond(BitSize, NewC.CCMask,
MaskVal << ShiftVal,
CmpVal << ShiftVal,
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20 changes: 20 additions & 0 deletions test/CodeGen/SystemZ/int-cmp-54.ll
Original file line number Diff line number Diff line change
@@ -0,0 +1,20 @@
; Check that custom handling of SETCC does not crash
;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13

@g_39 = external global [4 x i8], align 2
@g_2166 = external global <{ i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i32 }>, align 8

; Function Attrs: nounwind
define void @main() local_unnamed_addr #0 {
%1 = load volatile i88, i88* bitcast (<{ i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i32 }>* @g_2166 to i88*), align 8
%2 = lshr i88 %1, 87
%3 = trunc i88 %2 to i64
%4 = icmp sgt i64 %3, 9293
%5 = zext i1 %4 to i32
%6 = lshr i32 %5, 0
%7 = shl i32 %6, 6
%8 = trunc i32 %7 to i8
store i8 %8, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @g_39, i64 0, i64 1), align 1
unreachable
}

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