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Revert r313400 "[DebugInfo] Insert DW_OP_deref when spilling indirect…
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… DBG_VALUEs"

This caused asserts in Chromium. See http://crbug.com/766261

> Summary:
> This comes up in optimized debug info for C++ programs that pass and
> return objects indirectly by address. In these programs,
> llvm.dbg.declare survives optimization, which causes us to emit indirect
> DBG_VALUE instructions. The fast register allocator knows to insert
> DW_OP_deref when spilling indirect DBG_VALUE instructions, but the
> LiveDebugVariables did not until this change.
>
> This fixes part of PR34513. I need to look into why this doesn't work at
> -O0 and I'll send follow up patches to handle that.
>
> Reviewers: aprantl, dblaikie, probinson
>
> Subscribers: qcolombet, hiraditya, llvm-commits
>
> Differential Revision: https://reviews.llvm.org/D37911

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313589 91177308-0d34-0410-b5e6-96231b3b80d8
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zmodem committed Sep 18, 2017
1 parent dd54853 commit 96d3026
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Showing 4 changed files with 38 additions and 248 deletions.
88 changes: 35 additions & 53 deletions lib/CodeGen/LiveDebugVariables.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -108,8 +108,8 @@ class LDVImpl;
/// held by the same virtual register. The equivalence class is the transitive
/// closure of that relation.
class UserValue {
const DILocalVariable *Variable; ///< The debug info variable we are part of.
const DIExpression *Expression; ///< Any complex address expression.
const MDNode *Variable; ///< The debug info variable we are part of.
const MDNode *Expression; ///< Any complex address expression.
bool IsIndirect; ///< true if this is a register-indirect+offset value.
DebugLoc dl; ///< The debug location for the variable. This is
///< used by dwarf writer to find lexical scope.
Expand All @@ -132,9 +132,8 @@ class UserValue {
void coalesceLocation(unsigned LocNo);

/// insertDebugValue - Insert a DBG_VALUE into MBB at Idx for LocNo.
void insertDebugValue(MachineBasicBlock *MBB, SlotIndex Idx,
unsigned LocNo, bool Spilled, LiveIntervals &LIS,
const TargetInstrInfo &TII);
void insertDebugValue(MachineBasicBlock *MBB, SlotIndex Idx, unsigned LocNo,
LiveIntervals &LIS, const TargetInstrInfo &TII);

/// splitLocation - Replace OldLocNo ranges with NewRegs ranges where NewRegs
/// is live. Returns true if any changes were made.
Expand All @@ -143,8 +142,8 @@ class UserValue {

public:
/// UserValue - Create a new UserValue.
UserValue(const DILocalVariable *var, const DIExpression *expr, bool i,
DebugLoc L, LocMap::Allocator &alloc)
UserValue(const MDNode *var, const MDNode *expr, bool i, DebugLoc L,
LocMap::Allocator &alloc)
: Variable(var), Expression(expr), IsIndirect(i), dl(std::move(L)),
leader(this), locInts(alloc) {}

Expand All @@ -160,8 +159,8 @@ class UserValue {
UserValue *getNext() const { return next; }

/// match - Does this UserValue match the parameters?
bool match(const DILocalVariable *Var, const DIExpression *Expr,
const DILocation *IA, bool indirect) const {
bool match(const MDNode *Var, const MDNode *Expr, const DILocation *IA,
bool indirect) const {
return Var == Variable && Expr == Expression && dl->getInlinedAt() == IA &&
indirect == IsIndirect;
}
Expand Down Expand Up @@ -265,14 +264,12 @@ class UserValue {
LiveIntervals &LIS);

/// rewriteLocations - Rewrite virtual register locations according to the
/// provided virtual register map. Record which locations were spilled.
void rewriteLocations(VirtRegMap &VRM, const TargetRegisterInfo &TRI,
BitVector &SpilledLocations);
/// provided virtual register map.
void rewriteLocations(VirtRegMap &VRM, const TargetRegisterInfo &TRI);

/// emitDebugValues - Recreate DBG_VALUE instruction from data structures.
void emitDebugValues(VirtRegMap *VRM, LiveIntervals &LIS,
const TargetInstrInfo &TRI,
const BitVector &SpilledLocations);
void emitDebugValues(VirtRegMap *VRM,
LiveIntervals &LIS, const TargetInstrInfo &TRI);

/// getDebugLoc - Return DebugLoc of this UserValue.
DebugLoc getDebugLoc() { return dl;}
Expand Down Expand Up @@ -302,11 +299,11 @@ class LDVImpl {
VRMap virtRegToEqClass;

/// Map user variable to eq class leader.
using UVMap = DenseMap<const DILocalVariable *, UserValue *>;
using UVMap = DenseMap<const MDNode *, UserValue *>;
UVMap userVarMap;

/// getUserValue - Find or create a UserValue.
UserValue *getUserValue(const DILocalVariable *Var, const DIExpression *Expr,
UserValue *getUserValue(const MDNode *Var, const MDNode *Expr,
bool IsIndirect, const DebugLoc &DL);

/// lookupVirtReg - Find the EC leader for VirtReg or null.
Expand Down Expand Up @@ -459,9 +456,8 @@ void UserValue::mapVirtRegs(LDVImpl *LDV) {
LDV->mapVirtReg(locations[i].getReg(), this);
}

UserValue *LDVImpl::getUserValue(const DILocalVariable *Var,
const DIExpression *Expr, bool IsIndirect,
const DebugLoc &DL) {
UserValue *LDVImpl::getUserValue(const MDNode *Var, const MDNode *Expr,
bool IsIndirect, const DebugLoc &DL) {
UserValue *&Leader = userVarMap[Var];
if (Leader) {
UserValue *UV = Leader->getLeader();
Expand Down Expand Up @@ -500,11 +496,11 @@ bool LDVImpl::handleDebugValue(MachineInstr &MI, SlotIndex Idx) {
}

// Get or create the UserValue for (variable,offset).
bool IsIndirect = MI.getOperand(1).isImm();
bool IsIndirect = MI.isIndirectDebugValue();
if (IsIndirect)
assert(MI.getOperand(1).getImm() == 0 && "DBG_VALUE with nonzero offset");
const DILocalVariable *Var = MI.getDebugVariable();
const DIExpression *Expr = MI.getDebugExpression();
const MDNode *Var = MI.getDebugVariable();
const MDNode *Expr = MI.getDebugExpression();
//here.
UserValue *UV = getUserValue(Var, Expr, IsIndirect, MI.getDebugLoc());
UV->addDef(Idx, MI.getOperand(0));
Expand Down Expand Up @@ -977,10 +973,8 @@ splitRegister(unsigned OldReg, ArrayRef<unsigned> NewRegs, LiveIntervals &LIS) {
static_cast<LDVImpl*>(pImpl)->splitRegister(OldReg, NewRegs);
}

void UserValue::rewriteLocations(VirtRegMap &VRM, const TargetRegisterInfo &TRI,
BitVector &SpilledLocations) {
SpilledLocations.resize(locations.size());

void
UserValue::rewriteLocations(VirtRegMap &VRM, const TargetRegisterInfo &TRI) {
// Iterate over locations in reverse makes it easier to handle coalescing.
for (unsigned i = locations.size(); i ; --i) {
unsigned LocNo = i-1;
Expand All @@ -999,7 +993,6 @@ void UserValue::rewriteLocations(VirtRegMap &VRM, const TargetRegisterInfo &TRI,
} else if (VRM.getStackSlot(VirtReg) != VirtRegMap::NO_STACK_SLOT) {
// FIXME: Translate SubIdx to a stackslot offset.
Loc = MachineOperand::CreateFI(VRM.getStackSlot(VirtReg));
SpilledLocations.set(LocNo);
} else {
Loc.setReg(0);
Loc.setSubReg(0);
Expand Down Expand Up @@ -1033,7 +1026,7 @@ findInsertLocation(MachineBasicBlock *MBB, SlotIndex Idx,
}

void UserValue::insertDebugValue(MachineBasicBlock *MBB, SlotIndex Idx,
unsigned LocNo, bool Spilled,
unsigned LocNo,
LiveIntervals &LIS,
const TargetInstrInfo &TII) {
MachineBasicBlock::iterator I = findInsertLocation(MBB, Idx, LIS);
Expand All @@ -1043,35 +1036,25 @@ void UserValue::insertDebugValue(MachineBasicBlock *MBB, SlotIndex Idx,
assert(cast<DILocalVariable>(Variable)
->isValidLocationForIntrinsic(getDebugLoc()) &&
"Expected inlined-at fields to agree");

// If the location was spilled, the new DBG_VALUE will be indirect. If the
// original DBG_VALUE was indirect, we need to add DW_OP_deref to indicate
// that the original virtual register was a pointer.
bool NewIndirect = IsIndirect || Spilled;
const DIExpression *Expr = Expression;
if (Spilled && IsIndirect)
Expr = DIExpression::prepend(Expr, DIExpression::WithDeref);

MachineInstrBuilder MIB =
BuildMI(*MBB, I, getDebugLoc(), TII.get(TargetOpcode::DBG_VALUE))
.add(Loc);
if (NewIndirect)
MIB.addImm(0U);
if (Loc.isReg())
BuildMI(*MBB, I, getDebugLoc(), TII.get(TargetOpcode::DBG_VALUE),
IsIndirect, Loc.getReg(), Variable, Expression);
else
MIB.addReg(0U, RegState::Debug);
MIB.addMetadata(Variable).addMetadata(Expr);
BuildMI(*MBB, I, getDebugLoc(), TII.get(TargetOpcode::DBG_VALUE))
.add(Loc)
.addImm(0U)
.addMetadata(Variable)
.addMetadata(Expression);
}

void UserValue::emitDebugValues(VirtRegMap *VRM, LiveIntervals &LIS,
const TargetInstrInfo &TII,
const BitVector &SpilledLocations) {
const TargetInstrInfo &TII) {
MachineFunction::iterator MFEnd = VRM->getMachineFunction().end();

for (LocMap::const_iterator I = locInts.begin(); I.valid();) {
SlotIndex Start = I.start();
SlotIndex Stop = I.stop();
unsigned LocNo = I.value();
bool Spilled = LocNo != UndefLocNo ? SpilledLocations.test(LocNo) : false;

// If the interval start was trimmed to the lexical scope insert the
// DBG_VALUE at the previous index (otherwise it appears after the
Expand All @@ -1084,7 +1067,7 @@ void UserValue::emitDebugValues(VirtRegMap *VRM, LiveIntervals &LIS,
SlotIndex MBBEnd = LIS.getMBBEndIdx(&*MBB);

DEBUG(dbgs() << " BB#" << MBB->getNumber() << '-' << MBBEnd);
insertDebugValue(&*MBB, Start, LocNo, Spilled, LIS, TII);
insertDebugValue(&*MBB, Start, LocNo, LIS, TII);
// This interval may span multiple basic blocks.
// Insert a DBG_VALUE into each one.
while(Stop > MBBEnd) {
Expand All @@ -1094,7 +1077,7 @@ void UserValue::emitDebugValues(VirtRegMap *VRM, LiveIntervals &LIS,
break;
MBBEnd = LIS.getMBBEndIdx(&*MBB);
DEBUG(dbgs() << " BB#" << MBB->getNumber() << '-' << MBBEnd);
insertDebugValue(&*MBB, Start, LocNo, Spilled, LIS, TII);
insertDebugValue(&*MBB, Start, LocNo, LIS, TII);
}
DEBUG(dbgs() << '\n');
if (MBB == MFEnd)
Expand All @@ -1109,11 +1092,10 @@ void LDVImpl::emitDebugValues(VirtRegMap *VRM) {
if (!MF)
return;
const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo();
BitVector SpilledLocations;
for (unsigned i = 0, e = userValues.size(); i != e; ++i) {
DEBUG(userValues[i]->print(dbgs(), TRI));
userValues[i]->rewriteLocations(*VRM, *TRI, SpilledLocations);
userValues[i]->emitDebugValues(VRM, *LIS, *TII, SpilledLocations);
userValues[i]->rewriteLocations(*VRM, *TRI);
userValues[i]->emitDebugValues(VRM, *LIS, *TII);
}
EmitDone = true;
}
Expand Down
6 changes: 3 additions & 3 deletions test/DebugInfo/X86/bbjoin.ll
Original file line number Diff line number Diff line change
Expand Up @@ -11,12 +11,12 @@
; }
; CHECK: ![[X:.*]] = !DILocalVariable(name: "x",
; CHECK: bb.0.entry:
; CHECK: DBG_VALUE 23, debug-use _, ![[X]],
; CHECK: DBG_VALUE 23, 0, ![[X]],
; CHECK: DBG_VALUE %rsp, 0, ![[X]], !DIExpression(DW_OP_plus_uconst, 4, DW_OP_deref),
; CHECK: bb.1.if.then:
; CHECK: DBG_VALUE 43, debug-use _, ![[X]],
; CHECK: DBG_VALUE 43, 0, ![[X]],
; CHECK: bb.2.if.end:
; CHECK-NOT: DBG_VALUE 23, debug-use _, ![[X]],
; CHECK-NOT: DBG_VALUE 23, 0, ![[X]],
; CHECK: RETQ %eax

target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
Expand Down
103 changes: 0 additions & 103 deletions test/DebugInfo/X86/spill-indirect-nrvo.ll

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