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Assured confidential execution (ACE) implements VM-based trusted execution environment (TEE) for RISC-V with focus on a formally verified and auditable security monitor.

Rust 38 12 Updated Jan 27, 2025

Quickly build and run kernels inside a virtualized snapshot of your live system

Python 493 54 Updated Jan 25, 2025

Verified Rust for low-level systems code

Rust 1,294 78 Updated Jan 29, 2025

CORE-V Wally is a configurable RISC-V Processor associated with RISC-V System-on-Chip Design textbook. Contains a 5-stage pipeline, support for A, B, C, D, F, M and Q extensions, and optional cache…

SystemVerilog 305 232 Updated Jan 28, 2025

Juice Community Version Public Release

Go 550 44 Updated Jan 9, 2024

CUDA on non-NVIDIA GPUs

Rust 10,477 680 Updated Jan 28, 2025

Communication framework for RTL simulation and emulation.

Python 266 22 Updated Jan 15, 2025

A RISC-V software platform, exposing Analogue Pocket capabilities in a simple way

Verilog 39 2 Updated Aug 9, 2024

Friendly Adblock for YouTube: A fast, lightweight, and undetectable YouTube Ads Blocker for Chrome, Opera and Firefox.

CSS 2,423 113 Updated Oct 14, 2024

Securing platform software

C 16 3 Updated Apr 10, 2023

Quickly find differences and similarities in disassembled code

Java 2,386 150 Updated Jan 13, 2025

The Confidential Computing Certifier Framework consists of a client API called the Certifier-API and server-based policy evaluation called the Certifier Service. It simplifies and unifies programmi…

C++ 57 16 Updated Dec 12, 2024

Ancillary open source software to support confidential computing on NVIDIA GPUs

Python 223 32 Updated Dec 9, 2024

RISC Zero is a zero-knowledge verifiable general computing platform based on zk-STARKs and the RISC-V microarchitecture.

C++ 1,765 489 Updated Jan 29, 2025

Verilog AXI components for FPGA implementation

Verilog 1,594 467 Updated Dec 7, 2023

Minimax: a Compressed-First, Microcoded RISC-V CPU

Verilog 208 13 Updated Apr 21, 2024

XDP tutorial

C 2,566 595 Updated Jan 10, 2025

A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler feature.

VHDL 623 51 Updated Jan 28, 2025

RISC-V Guide. Learn all about the RISC-V computer architecture along with the Development Tools and Operating Systems to develop on RISC-V hardware.

Assembly 553 44 Updated Jan 4, 2024

🦀 How to minimize Rust binary size 📦

Rust 8,507 215 Updated Dec 26, 2024

FUSE-based file system for replicating SQLite databases across a cluster of machines

Go 4,202 99 Updated Jan 9, 2025

Techniques and numbers for estimating system's performance from first-principles

Rust 3,956 155 Updated Sep 15, 2024

A simple vaultless password manager in Go

Go 2,028 89 Updated Dec 11, 2024

AMD OpenNIC Project Overview

Shell 239 38 Updated Dec 20, 2022

Some materials and sample source for RV32 OS projects.

C 21 Updated May 31, 2022

Fully automated homelab from empty disk to running services with a single command.

Python 8,374 780 Updated Jan 21, 2025

x86 PC emulator and x86-to-wasm JIT, running in the browser

JavaScript 20,213 1,438 Updated Jan 27, 2025

Heterogeneous Research Platform (HERO) for exploration of heterogeneous computers consisting of programmable many-core accelerators and an application-class host CPU, including full-stack software …

SystemVerilog 98 24 Updated Sep 18, 2023

A terminal workspace with batteries included

Rust 22,829 681 Updated Jan 28, 2025
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