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Assured confidential execution (ACE) implements VM-based trusted execution environment (TEE) for RISC-V with focus on a formally verified and auditable security monitor.
Quickly build and run kernels inside a virtualized snapshot of your live system
CORE-V Wally is a configurable RISC-V Processor associated with RISC-V System-on-Chip Design textbook. Contains a 5-stage pipeline, support for A, B, C, D, F, M and Q extensions, and optional cache…
Communication framework for RTL simulation and emulation.
A RISC-V software platform, exposing Analogue Pocket capabilities in a simple way
Friendly Adblock for YouTube: A fast, lightweight, and undetectable YouTube Ads Blocker for Chrome, Opera and Firefox.
Quickly find differences and similarities in disassembled code
The Confidential Computing Certifier Framework consists of a client API called the Certifier-API and server-based policy evaluation called the Certifier Service. It simplifies and unifies programmi…
Ancillary open source software to support confidential computing on NVIDIA GPUs
RISC Zero is a zero-knowledge verifiable general computing platform based on zk-STARKs and the RISC-V microarchitecture.
Verilog AXI components for FPGA implementation
Minimax: a Compressed-First, Microcoded RISC-V CPU
A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler feature.
RISC-V Guide. Learn all about the RISC-V computer architecture along with the Development Tools and Operating Systems to develop on RISC-V hardware.
🦀 How to minimize Rust binary size 📦
FUSE-based file system for replicating SQLite databases across a cluster of machines
Techniques and numbers for estimating system's performance from first-principles
Some materials and sample source for RV32 OS projects.
Fully automated homelab from empty disk to running services with a single command.
x86 PC emulator and x86-to-wasm JIT, running in the browser
Heterogeneous Research Platform (HERO) for exploration of heterogeneous computers consisting of programmable many-core accelerators and an application-class host CPU, including full-stack software …
A terminal workspace with batteries included