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1. opentitan opentitan Public

   Forked from lowRISC/opentitan

   OpenTitan: Open source silicon root of trust

   SystemVerilog

2. ibex ibex Public

   Forked from lowRISC/ibex

   Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.

   SystemVerilog

3. ibex_flake ibex_flake Public

   Nix

4. riscv-isa-sim riscv-isa-sim Public

   Forked from lowRISC/riscv-isa-sim

   RISC-V Functional ISA Simulator

   C

5. riscv-dv riscv-dv Public

   Forked from chipsalliance/riscv-dv

   Random instruction generator for RISC-V processor verification

   Python

6. ibex-demo-system ibex-demo-system Public

   Forked from lowRISC/ibex-demo-system

   A demo system for Ibex including debug support and some peripherals

   C