Add operands access support for TriCore

CMakeLists.txt

@@ -548,6 +548,7 @@ if (CAPSTONE_TRICORE_SUPPORT)
             )
     set(HEADERS_TRICORE
             arch/TriCore/TriCoreDisassembler.h
+            arch/TriCore/TriCoreLinkage.h
             arch/TriCore/TriCoreGenAsmWriter.inc
             arch/TriCore/TriCoreGenDisassemblerTables.inc
             arch/TriCore/TriCoreGenInstrInfo.inc

Makefile

@@ -326,11 +326,10 @@ endif
 
 
 LIBOBJ =
-LIBOBJ += $(OBJDIR)/cs.o $(OBJDIR)/utils.o $(OBJDIR)/SStream.o $(OBJDIR)/MCInstrDesc.o $(OBJDIR)/MCRegisterInfo.o
+LIBOBJ += $(OBJDIR)/cs.o $(OBJDIR)/utils.o $(OBJDIR)/SStream.o $(OBJDIR)/MCInstrDesc.o $(OBJDIR)/MCRegisterInfo.o $(OBJDIR)/MCInst.o $(OBJDIR)/Mapping.o
 LIBOBJ += $(LIBOBJ_ARM) $(LIBOBJ_ARM64) $(LIBOBJ_M68K) $(LIBOBJ_MIPS) $(LIBOBJ_PPC) $(LIBOBJ_RISCV) $(LIBOBJ_SPARC) $(LIBOBJ_SYSZ) $(LIBOBJ_SH)
 LIBOBJ += $(LIBOBJ_X86) $(LIBOBJ_XCORE) $(LIBOBJ_TMS320C64X) $(LIBOBJ_M680X) $(LIBOBJ_EVM) $(LIBOBJ_MOS65XX) $(LIBOBJ_WASM) $(LIBOBJ_BPF)
 LIBOBJ += $(LIBOBJ_TRICORE)
-LIBOBJ += $(OBJDIR)/MCInst.o
 
 
 ifeq ($(PKG_EXTRA),)

Mapping.c

@@ -251,3 +251,4 @@ const cs_ac_type mapping_get_op_access(MCInst *MI, unsigned OpNum,
 
 DEFINE_get_detail_op(arm, ARM);
 DEFINE_get_detail_op(ppc, PPC);
+DEFINE_get_detail_op(tricore, TriCore);

Mapping.h

@@ -21,9 +21,9 @@ typedef struct insn_map {
 	unsigned short mapid;		    // The Capstone instruction id
 #ifndef CAPSTONE_DIET
 	uint16_t regs_use[MAX_IMPL_R_REGS]; ///< list of implicit registers used by
-					    ///< this instruction
+		///< this instruction
 	uint16_t regs_mod[MAX_IMPL_W_REGS]; ///< list of implicit registers modified
-					    ///< by this instruction
+		///< by this instruction
 	unsigned char groups
 		[MAX_NUM_GROUPS]; ///< list of group this instruction belong to
 	bool branch;		  // branch instruction?
@@ -47,7 +47,7 @@ typedef struct {
 	uint8_t /* cs_ac_type */ access; ///< The access type (read, write)
 	uint8_t				 /* cs_data_type */
 		dtypes[MAX_NO_DATA_TYPES]; ///< List of op types. Terminated by
-					   ///< CS_DATA_TYPE_LAST
+		///< CS_DATA_TYPE_LAST
 } mapping_op;
 
 #define MAX_NO_INSN_MAP_OPS 16
@@ -72,14 +72,14 @@ const cs_ac_type mapping_get_op_access(MCInst *MI, unsigned OpNum,
 /// Assumes the istruction operands map is called "insn_operands"
 /// Only usable by `auto-sync` archs!
 #define map_get_op_type(MI, OpNum) \
-	mapping_get_op_type(MI, OpNum, insn_operands, \
+	mapping_get_op_type(MI, OpNum, (const map_insn_ops *)insn_operands, \
 			    sizeof(insn_operands) / sizeof(insn_operands[0]))
 
 /// Macro for easier access of operand access flags from the map.
 /// Assumes the istruction operands map is called "insn_operands"
 /// Only usable by `auto-sync` archs!
 #define map_get_op_access(MI, OpNum) \
-	mapping_get_op_access(MI, OpNum, insn_operands, \
+	mapping_get_op_access(MI, OpNum, (const map_insn_ops *)insn_operands, \
 			      sizeof(insn_operands) / \
 				      sizeof(insn_operands[0]))
 
@@ -112,6 +112,7 @@ void map_cs_id(MCInst *MI, const insn_map *imap, unsigned int imap_size);
 
 DECL_get_detail_op(arm, ARM);
 DECL_get_detail_op(ppc, PPC);
+DECL_get_detail_op(tricore, TriCore);
 
 /// Increments the detail->arch.op_count by one.
 #define DEFINE_inc_detail_op_count(arch, ARCH) \
@@ -131,6 +132,8 @@ DEFINE_inc_detail_op_count(arm, ARM);
 DEFINE_dec_detail_op_count(arm, ARM);
 DEFINE_inc_detail_op_count(ppc, PPC);
 DEFINE_dec_detail_op_count(ppc, PPC);
+DEFINE_inc_detail_op_count(tricore, TriCore);
+DEFINE_dec_detail_op_count(tricore, TriCore);
 
 /// Returns true if a memory operand is currently edited.
 static inline bool doing_mem(const MCInst *MI)
@@ -154,6 +157,7 @@ static inline void set_doing_mem(const MCInst *MI, bool status)
 
 DEFINE_get_arch_detail(arm, ARM);
 DEFINE_get_arch_detail(ppc, PPC);
+DEFINE_get_arch_detail(tricore, TriCore);
 
 static inline bool detail_is_set(const MCInst *MI)
 {

arch/TriCore/TriCoreDisassembler.c

@@ -27,31 +27,8 @@
 #include "../../MathExtras.h"
 
 #include "TriCoreDisassembler.h"
-
-static bool readInstruction16(const uint8_t *code, size_t code_len,
-			      uint16_t *insn)
-{
-	if (code_len < 2)
-		// insufficient data
-		return false;
-
-	// Encoded as a little-endian 16-bit word in the stream.
-	*insn = (code[0] << 0) | (code[1] << 8);
-	return true;
-}
-
-static bool readInstruction32(const uint8_t *code, size_t code_len,
-			      uint32_t *insn)
-{
-	if (code_len < 4)
-		// insufficient data
-		return false;
-
-	// Encoded as a little-endian 32-bit word in the stream.
-	*insn = (code[0] << 0) | (code[1] << 8) | (code[2] << 16) |
-		(code[3] << 24);
-	return true;
-}
+#include "TriCoreMapping.h"
+#include "TriCoreLinkage.h"
 
 static unsigned getReg(MCRegisterInfo *MRI, unsigned RC, unsigned RegNo)
 {
@@ -1485,14 +1462,12 @@ static inline bool tryGetInstruction16(const uint8_t *code, size_t code_len,
 				       uint64_t address, void *info,
 				       const uint8_t *decoderTable16)
 {
-	uint16_t insn16;
-	DecodeStatus Result;
-	if (!readInstruction16(code, code_len, &insn16)) {
+	if (code_len < 2) {
 		return false;
 	}
-	// Calling the auto-generated decoder function.
-	Result = decodeInstruction_2(decoderTable16, MI, insn16, address, info,
-				     0);
+	uint16_t insn16 = readBytes16(MI, code);
+	DecodeStatus Result = decodeInstruction_2(decoderTable16, MI, insn16,
+						  address, info, 0);
 	if (Result != MCDisassembler_Fail) {
 		*size = 2;
 		return true;
@@ -1505,24 +1480,22 @@ static inline bool tryGetInstruction32(const uint8_t *code, size_t code_len,
 				       uint64_t address, void *info,
 				       const uint8_t *decoderTable32)
 {
-	uint32_t insn32;
-	DecodeStatus Result;
-	if (!readInstruction32(code, code_len, &insn32)) {
+	if (code_len < 4) {
 		return false;
 	}
-	// Calling the auto-generated decoder function.
-	Result = decodeInstruction_4(decoderTable32, MI, insn32, address, info,
-				     0);
+	uint32_t insn32 = readBytes32(MI, code);
+	DecodeStatus Result = decodeInstruction_4(decoderTable32, MI, insn32,
+						  address, info, 0);
 	if (Result != MCDisassembler_Fail) {
 		*size = 4;
 		return true;
 	}
 	return false;
 }
 
-bool TriCore_getInstruction(csh ud, const uint8_t *code, size_t code_len,
-			    MCInst *MI, uint16_t *size, uint64_t address,
-			    void *info)
+static bool getInstruction(csh ud, const uint8_t *code, size_t code_len,
+			   MCInst *MI, uint16_t *size, uint64_t address,
+			   void *info)
 {
 	if (!ud) {
 		return false;
@@ -1569,7 +1542,19 @@ bool TriCore_getInstruction(csh ud, const uint8_t *code, size_t code_len,
 				   DecoderTable32);
 }
 
-void TriCore_init(MCRegisterInfo *MRI)
+bool TriCore_LLVM_getInstruction(csh handle, const uint8_t *Bytes,
+				 size_t ByteLen, MCInst *MI, uint16_t *Size,
+				 uint64_t Address, void *Info)
+{
+	bool Result =
+		getInstruction(handle, Bytes, ByteLen, MI, Size, Address, Info);
+	if (Result) {
+		TriCore_set_instr_map_data(MI);
+	}
+	return Result;
+}
+
+void TriCore_init_mri(MCRegisterInfo *MRI)
 {
 	/*
 	InitMCRegisterInfo(TriCoreRegDesc, 45, RA, PC,

arch/TriCore/TriCoreDisassembler.h

@@ -12,12 +12,7 @@
 #include "../../MCRegisterInfo.h"
 #include "../../MCInst.h"
 
-void TriCore_init(MCRegisterInfo *MRI);
-
-bool TriCore_getInstruction(csh ud, const uint8_t *code, size_t code_len,
-			    MCInst *instr, uint16_t *size, uint64_t address,
-			    void *info);
-
+void TriCore_init_mri(MCRegisterInfo *MRI);
 bool TriCore_getFeatureBits(unsigned int mode, unsigned int feature);
 
 #endif