x86: fix the pause instruction reported by @Maijin in issue capstone-…

…engine#298
hsebs · Apr 2, 2015 · 6a4d277 · 6a4d277
1 parent d505d6d
commit 6a4d277
Showing 1 changed file with 4 additions and 6 deletions.
diff --git a/arch/X86/X86DisassemblerDecoder.c b/arch/X86/X86DisassemblerDecoder.c
@@ -1124,17 +1124,15 @@ static int getID(struct InternalInstruction *insn)
 			return -1;
 		}
 	} else {
-		if (insn->mode != MODE_16BIT && isPrefixAtLocation(insn, 0x66))
+		if (insn->mode != MODE_16BIT && isPrefixAtLocation(insn, 0x66)) {
 			attrMask |= ATTR_OPSIZE;
-		else if (isPrefixAtLocation(insn, 0x67))
+		} else if (isPrefixAtLocation(insn, 0x67))
 			attrMask |= ATTR_ADSIZE;
 
 		if (isPrefixAtLocation(insn, 0xf3)) {
-			if (insn->twoByteEscape == 0x0f)	// 0x66, 0x0f, ... like CRC32 case
-				attrMask |= ATTR_XS;
+			attrMask |= ATTR_XS;
 		} else if (isPrefixAtLocation(insn, 0xf2)) {
-			if (insn->twoByteEscape == 0x0f)	// 0x66, 0x0f, ... like CRC32 case
-				attrMask |= ATTR_XD;
+			attrMask |= ATTR_XD;
 		}
 	}