x86: handle more tricky instructions.

- support undocumented instructions FSTP & FSTPNCE. see http://blogs.technet.com/b/mmpc/archive/2013/06/24/investigation-of-a-new-undocumented-instruction-trick.aspx - TEST instructions with opcode 0xF6, 0xF7 (MRM1r)
hsebs · Apr 23, 2014 · fa69707 · fa69707
1 parent d711060
commit fa69707
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Showing 10 changed files with 107,661 additions and 107,448 deletions.
diff --git a/arch/X86/X86GenAsmWriter.inc b/arch/X86/X86GenAsmWriter.inc
diff --git a/arch/X86/X86GenAsmWriter1.inc b/arch/X86/X86GenAsmWriter1.inc
diff --git a/arch/X86/X86GenAsmWriter1_reduce.inc b/arch/X86/X86GenAsmWriter1_reduce.inc
@@ -1550,25 +1550,31 @@ static void printInstruction(MCInst *MI, SStream *O, MCRegisterInfo *MRI)
     0U,	// TCRETURNri64
     9657U,	// TEST16i16
     279618U,	// TEST16mi
+    279618U,	// TEST16mi_alt
     12854338U,	// TEST16ri
+    12854338U,	// TEST16ri_alt
     21242946U,	// TEST16rm
     12854338U,	// TEST16rr
     9825U,	// TEST32i32
     296002U,	// TEST32mi
     296002U,	// TEST32mi_alt
     12854338U,	// TEST32ri
+    12854338U,	// TEST32ri_alt
     8660034U,	// TEST32rm
     12854338U,	// TEST32rr
     9964U,	// TEST64i32
     304194U,	// TEST64mi32
+    304194U,	// TEST64mi32_alt
     12854338U,	// TEST64ri32
+    12854338U,	// TEST64ri32_alt
     17048642U,	// TEST64rm
     12854338U,	// TEST64rr
     9545U,	// TEST8i8
     312386U,	// TEST8mi
     312386U,	// TEST8mi_alt
     12854338U,	// TEST8ri
     0U,	// TEST8ri_NOREX
+    12854338U,	// TEST8ri_alt
     38020162U,	// TEST8rm
     12854338U,	// TEST8rr
     3143U,	// TLSCall_32

diff --git a/arch/X86/X86GenAsmWriter_reduce.inc b/arch/X86/X86GenAsmWriter_reduce.inc
@@ -1550,25 +1550,31 @@ static void printInstruction(MCInst *MI, SStream *O, MCRegisterInfo *MRI)
     0U,	// TCRETURNri64
     535191U,	// TEST16i16
     1067671U,	// TEST16mi
+    1067671U,	// TEST16mi_alt
     2173591U,	// TEST16ri
+    2173591U,	// TEST16ri_alt
     101015U,	// TEST16rm
     2173591U,	// TEST16rr
     2630759U,	// TEST32i32
     3163239U,	// TEST32mi
     3163239U,	// TEST32mi_alt
     2172007U,	// TEST32ri
+    2172007U,	// TEST32ri_alt
     66663U,	// TEST32rm
     2172007U,	// TEST32rr
     3680171U,	// TEST64i32
     4212651U,	// TEST64mi32
+    4212651U,	// TEST64mi32_alt
     2172843U,	// TEST64ri32
+    2172843U,	// TEST64ri32_alt
     83883U,	// TEST64rm
     2172843U,	// TEST64rr
     4727009U,	// TEST8i8
     5259489U,	// TEST8mi
     5259489U,	// TEST8mi_alt
     2171105U,	// TEST8ri
     0U,	// TEST8ri_NOREX
+    2171105U,	// TEST8ri_alt
     139489U,	// TEST8rm
     2171105U,	// TEST8rr
     4776U,	// TLSCall_32