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irqchip/gicv3-its: Disable the ITS before initializing it
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When starting a kexec/kdump kernel, the GIC ITS will already have been
enabled.  According to the ARM Generic Interrupt Controller
Architecture Specification (GIC architecture Version 3.0 and version
4.0), writing to GITS_BASER<n> or GITS_CBASER is "UNPREDICTABLE" when
the ITS is enabled.  On Cavium Thunder systems, this prevents the ITS
from being initializing in the kexec/kdump kernel, resulting in
failure to register/enable interrupts for all devices.

The fix is to disable the ITS if it is not already in the disabled
state.  This allows the ITS to be properly initialized and then
re-enabled in the kexec/kdump kernel.

Acked-by: Marc Zyngier <[email protected]>
Signed-off-by: David Daney <[email protected]>
Signed-off-by: Marc Zyngier <[email protected]>
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daviddaney authored and Marc Zyngier committed Aug 19, 2016
1 parent ccd9432 commit 7611da8
Showing 1 changed file with 6 additions and 1 deletion.
7 changes: 6 additions & 1 deletion drivers/irqchip/irq-gic-v3-its.c
Original file line number Diff line number Diff line change
Expand Up @@ -1545,7 +1545,12 @@ static int its_force_quiescent(void __iomem *base)
u32 val;

val = readl_relaxed(base + GITS_CTLR);
if (val & GITS_CTLR_QUIESCENT)
/*
* GIC architecture specification requires the ITS to be both
* disabled and quiescent for writes to GITS_BASER<n> or
* GITS_CBASER to not have UNPREDICTABLE results.
*/
if ((val & GITS_CTLR_QUIESCENT) && !(val & GITS_CTLR_ENABLE))
return 0;

/* Disable the generation of all interrupts to this ITS */
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