Fix memory leak in RISC V (capstone-engine#1424)

hwhohwh · Mar 15, 2019 · cb2940c · cb2940c
1 parent b5964c1
commit cb2940c
Showing 1 changed file with 1 addition and 0 deletions.
diff --git a/arch/RISCV/RISCVGenAsmWriter.inc b/arch/RISCV/RISCVGenAsmWriter.inc
@@ -2565,6 +2565,7 @@ static bool printAliasInstr(MCInst *MI, SStream * OS, void *info)
     ++I;
   tmpString[I] = 0;
   SStream_concat0(OS, tmpString);
+  cs_mem_free(tmpString);
   if (AsmString[I] != '\0') {
     if (AsmString[I] == ' ' || AsmString[I] == '\t') {
       SStream_concat0(OS, " ");