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Teach SelectionDAG to constant fold all-constant FMA nodes the same w…
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…ay that it constant folds FADD, FMUL, etc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181555 91177308-0d34-0410-b5e6-96231b3b80d8
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resistor committed May 9, 2013
1 parent 2c69417 commit 58dcd20
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Showing 2 changed files with 23 additions and 0 deletions.
15 changes: 15 additions & 0 deletions lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -3261,6 +3261,21 @@ SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
// Perform various simplifications.
ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
switch (Opcode) {
case ISD::FMA: {
ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1);
ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2);
ConstantFPSDNode *N3CFP = dyn_cast<ConstantFPSDNode>(N3);
if (N1CFP && N2CFP && N3CFP) {
APFloat V1 = N1CFP->getValueAPF();
const APFloat &V2 = N2CFP->getValueAPF();
const APFloat &V3 = N3CFP->getValueAPF();
APFloat::opStatus s =
V1.fusedMultiplyAdd(V2, V3, APFloat::rmNearestTiesToEven);
if (s != APFloat::opInvalidOp)
return getConstantFP(V1, VT);
}
break;
}
case ISD::CONCAT_VECTORS:
// A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
// one big BUILD_VECTOR.
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8 changes: 8 additions & 0 deletions test/CodeGen/X86/fma.ll
Original file line number Diff line number Diff line change
Expand Up @@ -34,6 +34,14 @@ entry:
ret x86_fp80 %call
}

; CHECK: test_f32_cst
; CHECK-NOT: fma
define float @test_f32_cst() nounwind readnone ssp {
entry:
%call = tail call float @llvm.fma.f32(float 3.0, float 3.0, float 3.0) nounwind readnone
ret float %call
}

declare float @llvm.fma.f32(float, float, float) nounwind readnone
declare double @llvm.fma.f64(double, double, double) nounwind readnone
declare x86_fp80 @llvm.fma.f80(x86_fp80, x86_fp80, x86_fp80) nounwind readnone

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