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Order CALLSEQ_START and CALLSEQ_END nodes.
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Fixes PR16146: gdb.base__call-ar-st.exp fails after
pre-RA-sched=source fixes.

Patch by Xiaoyi Guo!

This also fixes an unsupported dbg.value test case. Codegen was
previously incorrect but the test was passing by luck.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182885 91177308-0d34-0410-b5e6-96231b3b80d8
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@atrick
atrick committed May 29, 2013
1 parent 8df6f4b commit 6e0b2a0
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Showing 16 changed files with 80 additions and 52 deletions.
8 changes: 4 additions & 4 deletions include/llvm/CodeGen/SelectionDAG.h
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Original file line number Diff line number Diff line change
Expand Up @@ -513,24 +513,24 @@ class SelectionDAG {
/// getCALLSEQ_START - Return a new CALLSEQ_START node, which always must have
/// a glue result (to ensure it's not CSE'd). CALLSEQ_START does not have a
/// useful SDLoc.
SDValue getCALLSEQ_START(SDValue Chain, SDValue Op) {
SDValue getCALLSEQ_START(SDValue Chain, SDValue Op, SDLoc DL) {
SDVTList VTs = getVTList(MVT::Other, MVT::Glue);
SDValue Ops[] = { Chain, Op };
return getNode(ISD::CALLSEQ_START, SDLoc(), VTs, Ops, 2);
return getNode(ISD::CALLSEQ_START, DL, VTs, Ops, 2);
}

/// getCALLSEQ_END - Return a new CALLSEQ_END node, which always must have a
/// glue result (to ensure it's not CSE'd). CALLSEQ_END does not have
/// a useful SDLoc.
SDValue getCALLSEQ_END(SDValue Chain, SDValue Op1, SDValue Op2,
SDValue InGlue) {
SDValue InGlue, SDLoc DL) {
SDVTList NodeTys = getVTList(MVT::Other, MVT::Glue);
SmallVector<SDValue, 4> Ops;
Ops.push_back(Chain);
Ops.push_back(Op1);
Ops.push_back(Op2);
Ops.push_back(InGlue);
return getNode(ISD::CALLSEQ_END, SDLoc(), NodeTys, &Ops[0],
return getNode(ISD::CALLSEQ_END, DL, NodeTys, &Ops[0],
(unsigned)Ops.size() - (InGlue.getNode() == 0 ? 1 : 0));
}

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6 changes: 4 additions & 2 deletions lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -1572,7 +1572,8 @@ void SelectionDAGLegalize::ExpandDYNAMIC_STACKALLOC(SDNode* Node,

// Chain the dynamic stack allocation so that it doesn't modify the stack
// pointer when other instructions are using the stack.
Chain = DAG.getCALLSEQ_START(Chain, DAG.getIntPtrConstant(0, true));
Chain = DAG.getCALLSEQ_START(Chain, DAG.getIntPtrConstant(0, true),
SDLoc(Node));

SDValue Size = Tmp2.getOperand(1);
SDValue SP = DAG.getCopyFromReg(Chain, dl, SPReg, VT);
Expand All @@ -1586,7 +1587,8 @@ void SelectionDAGLegalize::ExpandDYNAMIC_STACKALLOC(SDNode* Node,
Chain = DAG.getCopyToReg(Chain, dl, SPReg, Tmp1); // Output chain

Tmp2 = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(0, true),
DAG.getIntPtrConstant(0, true), SDValue());
DAG.getIntPtrConstant(0, true), SDValue(),
SDLoc(Node));

Results.push_back(Tmp1);
Results.push_back(Tmp2);
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7 changes: 4 additions & 3 deletions lib/Target/AArch64/AArch64ISelLowering.cpp
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Expand Up @@ -1151,7 +1151,8 @@ AArch64TargetLowering::LowerCall(CallLoweringInfo &CLI,
}

if (!IsSibCall)
Chain = DAG.getCALLSEQ_START(Chain, DAG.getIntPtrConstant(NumBytes, true));
Chain = DAG.getCALLSEQ_START(Chain, DAG.getIntPtrConstant(NumBytes, true),
dl);

SDValue StackPtr = DAG.getCopyFromReg(Chain, dl, AArch64::XSP,
getPointerTy());
Expand Down Expand Up @@ -1282,7 +1283,7 @@ AArch64TargetLowering::LowerCall(CallLoweringInfo &CLI,
// in the correct location.
if (IsTailCall && !IsSibCall) {
Chain = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(NumBytes, true),
DAG.getIntPtrConstant(0, true), InFlag);
DAG.getIntPtrConstant(0, true), InFlag, dl);
InFlag = Chain.getValue(1);
}

Expand Down Expand Up @@ -1336,7 +1337,7 @@ AArch64TargetLowering::LowerCall(CallLoweringInfo &CLI,

Chain = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(NumBytes, true),
DAG.getIntPtrConstant(CalleePopBytes, true),
InFlag);
InFlag, dl);
InFlag = Chain.getValue(1);
}

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5 changes: 3 additions & 2 deletions lib/Target/ARM/ARMISelLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -1408,7 +1408,8 @@ ARMTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
// Adjust the stack pointer for the new arguments...
// These operations are automatically eliminated by the prolog/epilog pass
if (!isSibCall)
Chain = DAG.getCALLSEQ_START(Chain, DAG.getIntPtrConstant(NumBytes, true));
Chain = DAG.getCALLSEQ_START(Chain, DAG.getIntPtrConstant(NumBytes, true),
dl);

SDValue StackPtr = DAG.getCopyFromReg(Chain, dl, ARM::SP, getPointerTy());

Expand Down Expand Up @@ -1731,7 +1732,7 @@ ARMTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
InFlag = Chain.getValue(1);

Chain = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(NumBytes, true),
DAG.getIntPtrConstant(0, true), InFlag);
DAG.getIntPtrConstant(0, true), InFlag, dl);
if (!Ins.empty())
InFlag = Chain.getValue(1);

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5 changes: 3 additions & 2 deletions lib/Target/Hexagon/HexagonISelLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -513,7 +513,8 @@ HexagonTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,

if (!isTailCall)
Chain = DAG.getCALLSEQ_START(Chain, DAG.getConstant(NumBytes,
getPointerTy(), true));
getPointerTy(), true),
dl);

// Build a sequence of copy-to-reg nodes chained together with token
// chain and flag operands which copy the outgoing args into registers.
Expand Down Expand Up @@ -588,7 +589,7 @@ HexagonTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,

// Create the CALLSEQ_END node.
Chain = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(NumBytes, true),
DAG.getIntPtrConstant(0, true), InFlag);
DAG.getIntPtrConstant(0, true), InFlag, dl);
InFlag = Chain.getValue(1);

// Handle result values, copying them out of physregs into vregs that we
Expand Down
5 changes: 3 additions & 2 deletions lib/Target/MBlaze/MBlazeISelLowering.cpp
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Expand Up @@ -719,7 +719,8 @@ LowerCall(TargetLowering::CallLoweringInfo &CLI,
// Variable argument function calls require a minimum of 24-bytes of stack
if (isVarArg && NumBytes < 24) NumBytes = 24;

Chain = DAG.getCALLSEQ_START(Chain, DAG.getIntPtrConstant(NumBytes, true));
Chain = DAG.getCALLSEQ_START(Chain, DAG.getIntPtrConstant(NumBytes, true),
dl);

SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass;
SmallVector<SDValue, 8> MemOpChains;
Expand Down Expand Up @@ -829,7 +830,7 @@ LowerCall(TargetLowering::CallLoweringInfo &CLI,

// Create the CALLSEQ_END node.
Chain = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(NumBytes, true),
DAG.getIntPtrConstant(0, true), InFlag);
DAG.getIntPtrConstant(0, true), InFlag, dl);
if (!Ins.empty())
InFlag = Chain.getValue(1);

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5 changes: 3 additions & 2 deletions lib/Target/MSP430/MSP430ISelLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -476,7 +476,8 @@ MSP430TargetLowering::LowerCCCCallTo(SDValue Chain, SDValue Callee,
unsigned NumBytes = CCInfo.getNextStackOffset();

Chain = DAG.getCALLSEQ_START(Chain ,DAG.getConstant(NumBytes,
getPointerTy(), true));
getPointerTy(), true),
dl);

SmallVector<std::pair<unsigned, SDValue>, 4> RegsToPass;
SmallVector<SDValue, 12> MemOpChains;
Expand Down Expand Up @@ -583,7 +584,7 @@ MSP430TargetLowering::LowerCCCCallTo(SDValue Chain, SDValue Callee,
Chain = DAG.getCALLSEQ_END(Chain,
DAG.getConstant(NumBytes, getPointerTy(), true),
DAG.getConstant(0, getPointerTy(), true),
InFlag);
InFlag, dl);
InFlag = Chain.getValue(1);

// Handle result values, copying them out of physregs into vregs that we
Expand Down
4 changes: 2 additions & 2 deletions lib/Target/Mips/MipsISelLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -2360,7 +2360,7 @@ MipsTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
SDValue NextStackOffsetVal = DAG.getIntPtrConstant(NextStackOffset, true);

if (!IsTailCall)
Chain = DAG.getCALLSEQ_START(Chain, NextStackOffsetVal);
Chain = DAG.getCALLSEQ_START(Chain, NextStackOffsetVal, DL);

SDValue StackPtr = DAG.getCopyFromReg(Chain, DL,
IsN64 ? Mips::SP_64 : Mips::SP,
Expand Down Expand Up @@ -2498,7 +2498,7 @@ MipsTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,

// Create the CALLSEQ_END node.
Chain = DAG.getCALLSEQ_END(Chain, NextStackOffsetVal,
DAG.getIntPtrConstant(0, true), InFlag);
DAG.getIntPtrConstant(0, true), InFlag, DL);
InFlag = Chain.getValue(1);

// Handle result values, copying them out of physregs into vregs that we
Expand Down
7 changes: 4 additions & 3 deletions lib/Target/NVPTX/NVPTXISelLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -449,8 +449,9 @@ SDValue NVPTXTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
bool isABI = (nvptxSubtarget.getSmVersion() >= 20);

SDValue tempChain = Chain;
Chain =
DAG.getCALLSEQ_START(Chain, DAG.getIntPtrConstant(uniqueCallSite, true));
Chain = DAG.getCALLSEQ_START(Chain,
DAG.getIntPtrConstant(uniqueCallSite, true),
dl);
SDValue InFlag = Chain.getValue(1);

assert((Outs.size() == Args.size()) &&
Expand Down Expand Up @@ -795,7 +796,7 @@ SDValue NVPTXTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
}
Chain = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(uniqueCallSite, true),
DAG.getIntPtrConstant(uniqueCallSite + 1, true),
InFlag);
InFlag, dl);
uniqueCallSite++;

// set isTailCall to false for now, until we figure out how to express
Expand Down
19 changes: 12 additions & 7 deletions lib/Target/PowerPC/PPCISelLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -3100,7 +3100,7 @@ void PrepareTailCall(SelectionDAG &DAG, SDValue &InFlag, SDValue &Chain,

// Emit callseq_end just before tailcall node.
Chain = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(NumBytes, true),
DAG.getIntPtrConstant(0, true), InFlag);
DAG.getIntPtrConstant(0, true), InFlag, dl);
InFlag = Chain.getValue(1);
}

Expand Down Expand Up @@ -3422,7 +3422,7 @@ PPCTargetLowering::FinishCall(CallingConv::ID CallConv, SDLoc dl,

Chain = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(NumBytes, true),
DAG.getIntPtrConstant(BytesCalleePops, true),
InFlag);
InFlag, dl);
if (!Ins.empty())
InFlag = Chain.getValue(1);

Expand Down Expand Up @@ -3557,7 +3557,8 @@ PPCTargetLowering::LowerCall_32SVR4(SDValue Chain, SDValue Callee,

// Adjust the stack pointer for the new arguments...
// These operations are automatically eliminated by the prolog/epilog pass
Chain = DAG.getCALLSEQ_START(Chain, DAG.getIntPtrConstant(NumBytes, true));
Chain = DAG.getCALLSEQ_START(Chain, DAG.getIntPtrConstant(NumBytes, true),
dl);
SDValue CallSeqStart = Chain;

// Load the return address and frame pointer so it can be moved somewhere else
Expand Down Expand Up @@ -3608,7 +3609,8 @@ PPCTargetLowering::LowerCall_32SVR4(SDValue Chain, SDValue Callee,

// This must go outside the CALLSEQ_START..END.
SDValue NewCallSeqStart = DAG.getCALLSEQ_START(MemcpyCall,
CallSeqStart.getNode()->getOperand(1));
CallSeqStart.getNode()->getOperand(1),
SDLoc(MemcpyCall));
DAG.ReplaceAllUsesWith(CallSeqStart.getNode(),
NewCallSeqStart.getNode());
Chain = CallSeqStart = NewCallSeqStart;
Expand Down Expand Up @@ -3690,7 +3692,8 @@ PPCTargetLowering::createMemcpyOutsideCallSeq(SDValue Arg, SDValue PtrOff,
Flags, DAG, dl);
// The MEMCPY must go outside the CALLSEQ_START..END.
SDValue NewCallSeqStart = DAG.getCALLSEQ_START(MemcpyCall,
CallSeqStart.getNode()->getOperand(1));
CallSeqStart.getNode()->getOperand(1),
SDLoc(MemcpyCall));
DAG.ReplaceAllUsesWith(CallSeqStart.getNode(),
NewCallSeqStart.getNode());
return NewCallSeqStart;
Expand Down Expand Up @@ -3744,7 +3747,8 @@ PPCTargetLowering::LowerCall_64SVR4(SDValue Chain, SDValue Callee,

// Adjust the stack pointer for the new arguments...
// These operations are automatically eliminated by the prolog/epilog pass
Chain = DAG.getCALLSEQ_START(Chain, DAG.getIntPtrConstant(NumBytes, true));
Chain = DAG.getCALLSEQ_START(Chain, DAG.getIntPtrConstant(NumBytes, true),
dl);
SDValue CallSeqStart = Chain;

// Load the return address and frame pointer so it can be move somewhere else
Expand Down Expand Up @@ -4115,7 +4119,8 @@ PPCTargetLowering::LowerCall_Darwin(SDValue Chain, SDValue Callee,

// Adjust the stack pointer for the new arguments...
// These operations are automatically eliminated by the prolog/epilog pass
Chain = DAG.getCALLSEQ_START(Chain, DAG.getIntPtrConstant(NumBytes, true));
Chain = DAG.getCALLSEQ_START(Chain, DAG.getIntPtrConstant(NumBytes, true),
dl);
SDValue CallSeqStart = Chain;

// Load the return address and frame pointer so it can be move somewhere else
Expand Down
10 changes: 6 additions & 4 deletions lib/Target/Sparc/SparcISelLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -702,7 +702,8 @@ SparcTargetLowering::LowerCall_32(TargetLowering::CallLoweringInfo &CLI,
ByValArgs.push_back(FIPtr);
}

Chain = DAG.getCALLSEQ_START(Chain, DAG.getIntPtrConstant(ArgsSize, true));
Chain = DAG.getCALLSEQ_START(Chain, DAG.getIntPtrConstant(ArgsSize, true),
dl);

SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass;
SmallVector<SDValue, 8> MemOpChains;
Expand Down Expand Up @@ -886,7 +887,7 @@ SparcTargetLowering::LowerCall_32(TargetLowering::CallLoweringInfo &CLI,
InFlag = Chain.getValue(1);

Chain = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(ArgsSize, true),
DAG.getIntPtrConstant(0, true), InFlag);
DAG.getIntPtrConstant(0, true), InFlag, dl);
InFlag = Chain.getValue(1);

// Assign locations to each value returned by this call.
Expand Down Expand Up @@ -1004,7 +1005,8 @@ SparcTargetLowering::LowerCall_64(TargetLowering::CallLoweringInfo &CLI,
// Adjust the stack pointer to make room for the arguments.
// FIXME: Use hasReservedCallFrame to avoid %sp adjustments around all calls
// with more than 6 arguments.
Chain = DAG.getCALLSEQ_START(Chain, DAG.getIntPtrConstant(ArgsSize, true));
Chain = DAG.getCALLSEQ_START(Chain, DAG.getIntPtrConstant(ArgsSize, true),
DL);

// Collect the set of registers to pass to the function and their values.
// This will be emitted as a sequence of CopyToReg nodes glued to the call
Expand Down Expand Up @@ -1122,7 +1124,7 @@ SparcTargetLowering::LowerCall_64(TargetLowering::CallLoweringInfo &CLI,

// Revert the stack pointer immediately after the call.
Chain = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(ArgsSize, true),
DAG.getIntPtrConstant(0, true), InGlue);
DAG.getIntPtrConstant(0, true), InGlue, DL);
InGlue = Chain.getValue(1);

// Now extract the return values. This is more or less the same as
Expand Down
5 changes: 3 additions & 2 deletions lib/Target/SystemZ/SystemZISelLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -623,7 +623,8 @@ SystemZTargetLowering::LowerCall(CallLoweringInfo &CLI,
unsigned NumBytes = ArgCCInfo.getNextStackOffset();

// Mark the start of the call.
Chain = DAG.getCALLSEQ_START(Chain, DAG.getConstant(NumBytes, PtrVT, true));
Chain = DAG.getCALLSEQ_START(Chain, DAG.getConstant(NumBytes, PtrVT, true),
DL);

// Copy argument values to their designated locations.
SmallVector<std::pair<unsigned, SDValue>, 9> RegsToPass;
Expand Down Expand Up @@ -714,7 +715,7 @@ SystemZTargetLowering::LowerCall(CallLoweringInfo &CLI,
Chain = DAG.getCALLSEQ_END(Chain,
DAG.getConstant(NumBytes, PtrVT, true),
DAG.getConstant(0, PtrVT, true),
Glue);
Glue, DL);
Glue = Chain.getValue(1);

// Assign locations to each value returned by this call.
Expand Down
7 changes: 4 additions & 3 deletions lib/Target/X86/X86ISelLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -2354,7 +2354,8 @@ X86TargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
}

if (!IsSibcall)
Chain = DAG.getCALLSEQ_START(Chain, DAG.getIntPtrConstant(NumBytes, true));
Chain = DAG.getCALLSEQ_START(Chain, DAG.getIntPtrConstant(NumBytes, true),
dl);

SDValue RetAddrFrIdx;
// Load return address for tail calls.
Expand Down Expand Up @@ -2640,7 +2641,7 @@ X86TargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,

if (!IsSibcall && isTailCall) {
Chain = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(NumBytes, true),
DAG.getIntPtrConstant(0, true), InFlag);
DAG.getIntPtrConstant(0, true), InFlag, dl);
InFlag = Chain.getValue(1);
}

Expand Down Expand Up @@ -2699,7 +2700,7 @@ X86TargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
DAG.getIntPtrConstant(NumBytes, true),
DAG.getIntPtrConstant(NumBytesForCalleeToPush,
true),
InFlag);
InFlag, dl);
InFlag = Chain.getValue(1);
}

Expand Down
4 changes: 2 additions & 2 deletions lib/Target/XCore/XCoreISelLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -901,7 +901,7 @@ XCoreTargetLowering::LowerCCCCallTo(SDValue Chain, SDValue Callee,
unsigned NumBytes = CCInfo.getNextStackOffset();

Chain = DAG.getCALLSEQ_START(Chain,DAG.getConstant(NumBytes,
getPointerTy(), true));
getPointerTy(), true), dl);

SmallVector<std::pair<unsigned, SDValue>, 4> RegsToPass;
SmallVector<SDValue, 12> MemOpChains;
Expand Down Expand Up @@ -991,7 +991,7 @@ XCoreTargetLowering::LowerCCCCallTo(SDValue Chain, SDValue Callee,
Chain = DAG.getCALLSEQ_END(Chain,
DAG.getConstant(NumBytes, getPointerTy(), true),
DAG.getConstant(0, getPointerTy(), true),
InFlag);
InFlag, dl);
InFlag = Chain.getValue(1);

// Handle result values, copying them out of physregs into vregs that we
Expand Down
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