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Use literal pool loads instead of MOVW/MOVT for materializing global …
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…addresses when optimizing for size.

On spec/gcc, this caused a codesize improvement of ~1.9% for ARM mode and ~4.9% for Thumb(2) mode. This is
codesize including literal pools.

The pools themselves doubled in size for ARM mode and quintupled for Thumb mode, leaving suggestion that there
is still perhaps redundancy in LLVM's use of constant pools that could be decreased by sharing entries.

Fixes PR11087.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142530 91177308-0d34-0410-b5e6-96231b3b80d8
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James Molloy committed Oct 19, 2011
1 parent 40230c4 commit cdd8e46
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Showing 2 changed files with 33 additions and 3 deletions.
9 changes: 6 additions & 3 deletions lib/Target/ARM/ARMISelLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2103,8 +2103,10 @@ SDValue ARMTargetLowering::LowerGlobalAddressELF(SDValue Op,
}

// If we have T2 ops, we can materialize the address directly via movt/movw
// pair. This is always cheaper.
if (Subtarget->useMovt()) {
// pair. This is always cheaper in terms of performance, but uses at least 2
// extra bytes.
if (Subtarget->useMovt() &&
!DAG.getMachineFunction().getFunction()->hasFnAttr(Attribute::OptimizeForSize)) {
++NumMovwMovt;
// FIXME: Once remat is capable of dealing with instructions with register
// operands, expand this into two nodes.
Expand All @@ -2129,7 +2131,8 @@ SDValue ARMTargetLowering::LowerGlobalAddressDarwin(SDValue Op,
ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();

// FIXME: Enable this for static codegen when tool issues are fixed.
if (Subtarget->useMovt() && RelocM != Reloc::Static) {
if (Subtarget->useMovt() && RelocM != Reloc::Static &&
!DAG.getMachineFunction().getFunction()->hasFnAttr(Attribute::OptimizeForSize)) {
++NumMovwMovt;
// FIXME: Once remat is capable of dealing with instructions with register
// operands, expand this into two nodes.
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27 changes: 27 additions & 0 deletions test/CodeGen/ARM/2011-10-18-DisableMovtSize.ll
Original file line number Diff line number Diff line change
@@ -0,0 +1,27 @@
; RUN: llc < %s -mtriple=armv7-apple-darwin | FileCheck %s
; RUN: llc < %s -mtriple=armv7-unknown-linux-eabi | FileCheck %s

; Check that when optimizing for size, a literal pool load is used
; instead of the (potentially faster) movw/movt pair when loading
; a large constant.

@x = global i32* inttoptr (i32 305419888 to i32*), align 4

define i32 @f() optsize {
; CHECK: f:
; CHECK: ldr r{{.}}, {{.?}}LCPI{{.}}_{{.}}
; CHECK: ldr r{{.}}, [{{(pc, )?}}r{{.}}]
; CHECK: ldr r{{.}}, [r{{.}}]
%1 = load i32** @x, align 4
%2 = load i32* %1
ret i32 %2
}

define i32 @g() {
; CHECK: g:
; CHECK: movw
; CHECK: movt
%1 = load i32** @x, align 4
%2 = load i32* %1
ret i32 %2
}

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