Skip to content

Commit

Permalink
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next
Browse files Browse the repository at this point in the history 
Pull networking updates from David Miller:

Changes of note:

 1) Allow to schedule ICMP packets in IPVS, from Alex Gartrell.

 2) Provide FIB table ID in ipv4 route dumps just as ipv6 does, from
    David Ahern.

 3) Allow the user to ask for the statistics to be filtered out of
    ipv4/ipv6 address netlink dumps.  From Sowmini Varadhan.

 4) More work to pass the network namespace context around deep into
    various packet path APIs, starting with the netfilter hooks.  From
    Eric W Biederman.

 5) Add layer 2 TX/RX checksum offloading to qeth driver, from Thomas
    Richter.

 6) Use usec resolution for SYN/ACK RTTs in TCP, from Yuchung Cheng.

 7) Support Very High Throughput in wireless MESH code, from Bob
    Copeland.

 8) Allow setting the ageing_time in switchdev/rocker.  From Scott
    Feldman.

 9) Properly autoload L2TP type modules, from Stephen Hemminger.

10) Fix and enable offload features by default in 8139cp driver, from
    David Woodhouse.

11) Support both ipv4 and ipv6 sockets in a single vxlan device, from
    Jiri Benc.

12) Fix CWND limiting of thin streams in TCP, from Bendik Rønning
    Opstad.

13) Fix IPSEC flowcache overflows on large systems, from Steffen
    Klassert.

14) Convert bridging to track VLANs using rhashtable entries rather than
    a bitmap.  From Nikolay Aleksandrov.

15) Make TCP listener handling completely lockless, this is a major
    accomplishment.  Incoming request sockets now live in the
    established hash table just like any other socket too.

    From Eric Dumazet.

15) Provide more bridging attributes to netlink, from Nikolay
    Aleksandrov.

16) Use hash based algorithm for ipv4 multipath routing, this was very
    long overdue.  From Peter Nørlund.

17) Several y2038 cures, mostly avoiding timespec.  From Arnd Bergmann.

18) Allow non-root execution of EBPF programs, from Alexei Starovoitov.

19) Support SO_INCOMING_CPU as setsockopt, from Eric Dumazet.  This
    influences the port binding selection logic used by SO_REUSEPORT.

20) Add ipv6 support to VRF, from David Ahern.

21) Add support for Mellanox Spectrum switch ASIC, from Jiri Pirko.

22) Add rtl8xxxu Realtek wireless driver, from Jes Sorensen.

23) Implement RACK loss recovery in TCP, from Yuchung Cheng.

24) Support multipath routes in MPLS, from Roopa Prabhu.

25) Fix POLLOUT notification for listening sockets in AF_UNIX, from Eric
    Dumazet.

26) Add new QED Qlogic river, from Yuval Mintz, Manish Chopra, and
    Sudarsana Kalluru.

27) Don't fetch timestamps on AF_UNIX sockets, from Hannes Frederic
    Sowa.

28) Support ipv6 geneve tunnels, from John W Linville.

29) Add flood control support to switchdev layer, from Ido Schimmel.

30) Fix CHECKSUM_PARTIAL handling of potentially fragmented frames, from
    Hannes Frederic Sowa.

31) Support persistent maps and progs in bpf, from Daniel Borkmann.

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next: (1790 commits)
  sh_eth: use DMA barriers
  switchdev: respect SKIP_EOPNOTSUPP flag in case there is no recursion
  net: sched: kill dead code in sch_choke.c
  irda: Delete an unnecessary check before the function call "irlmp_unregister_service"
  net: dsa: mv88e6xxx: include DSA ports in VLANs
  net: dsa: mv88e6xxx: disable SA learning for DSA and CPU ports
  net/core: fix for_each_netdev_feature
  vlan: Invoke driver vlan hooks only if device is present
  arcnet/com20020: add LEDS_CLASS dependency
  bpf, verifier: annotate verbose printer with __printf
  dp83640: Only wait for timestamps for packets with timestamping enabled.
  ptp: Change ptp_class to a proper bitmask
  dp83640: Prune rx timestamp list before reading from it
  dp83640: Delay scheduled work.
  dp83640: Include hash in timestamp/packet matching
  ipv6: fix tunnel error handling
  net/mlx5e: Fix LSO vlan insertion
  net/mlx5e: Re-eanble client vlan TX acceleration
  net/mlx5e: Return error in case mlx5e_set_features() fails
  net/mlx5e: Don't allow more than max supported channels
  ...
  • Loading branch information
@torvalds
torvalds committed Nov 4, 2015
2 parents ccc9d4a + f32bfb9 commit b0f85fa
Show file tree
Hide file tree
Showing 1,595 changed files with 115,014 additions and 24,098 deletions.
5 changes: 3 additions & 2 deletions Documentation/DocBook/80211.tmpl
View file
Original file line number Diff line number Diff line change
Expand Up @@ -154,8 +154,9 @@
!Finclude/net/cfg80211.h cfg80211_scan_request
!Finclude/net/cfg80211.h cfg80211_scan_done
!Finclude/net/cfg80211.h cfg80211_bss
!Finclude/net/cfg80211.h cfg80211_inform_bss_width_frame
!Finclude/net/cfg80211.h cfg80211_inform_bss_width
!Finclude/net/cfg80211.h cfg80211_inform_bss
!Finclude/net/cfg80211.h cfg80211_inform_bss_frame_data
!Finclude/net/cfg80211.h cfg80211_inform_bss_data
!Finclude/net/cfg80211.h cfg80211_unlink_bss
!Finclude/net/cfg80211.h cfg80211_find_ie
!Finclude/net/cfg80211.h ieee80211_bss_get_ie
Expand Down
10 changes: 10 additions & 0 deletions Documentation/devicetree/bindings/net/apm-xgene-enet.txt
View file
Original file line number Diff line number Diff line change
Expand Up @@ -37,6 +37,14 @@ Required properties for ethernet interfaces that have external PHY:

Optional properties:
- status: Should be "ok" or "disabled" for enabled/disabled. Default is "ok".
- tx-delay: Delay value for RGMII bridge TX clock.
Valid values are between 0 to 7, that maps to
417, 717, 1020, 1321, 1611, 1913, 2215, 2514 ps
Default value is 4, which corresponds to 1611 ps
- rx-delay: Delay value for RGMII bridge RX clock.
Valid values are between 0 to 7, that maps to
273, 589, 899, 1222, 1480, 1806, 2147, 2464 ps
Default value is 2, which corresponds to 899 ps

Example:
menetclk: menetclk {
Expand Down Expand Up @@ -72,5 +80,7 @@ Example:

/* Board-specific peripheral configurations */
&menet {
tx-delay = <4>;
rx-delay = <2>;
status = "ok";
};
23 changes: 23 additions & 0 deletions Documentation/devicetree/bindings/net/brcm,iproc-mdio.txt
View file
Original file line number Diff line number Diff line change
@@ -0,0 +1,23 @@
* Broadcom iProc MDIO bus controller

Required properties:
- compatible: should be "brcm,iproc-mdio"
- reg: address and length of the register set for the MDIO interface
- #size-cells: must be 1
- #address-cells: must be 0

Child nodes of this MDIO bus controller node are standard Ethernet PHY device
nodes as described in Documentation/devicetree/bindings/net/phy.txt

Example:

mdio@18002000 {
compatible = "brcm,iproc-mdio";
reg = <0x18002000 0x8>;
#size-cells = <1>;
#address-cells = <0>;

enet-gphy@0 {
reg = <0>;
};
};
36 changes: 36 additions & 0 deletions Documentation/devicetree/bindings/net/can/sun4i_can.txt
View file
Original file line number Diff line number Diff line change
@@ -0,0 +1,36 @@
Allwinner A10/A20 CAN controller Device Tree Bindings
-----------------------------------------------------

Required properties:
- compatible: "allwinner,sun4i-a10-can"
- reg: physical base address and size of the Allwinner A10/A20 CAN register map.
- interrupts: interrupt specifier for the sole interrupt.
- clock: phandle and clock specifier.

Example
-------

SoC common .dtsi file:

can0_pins_a: can0@0 {
allwinner,pins = "PH20","PH21";
allwinner,function = "can";
allwinner,drive = <0>;
allwinner,pull = <0>;
};
...
can0: can@01c2bc00 {
compatible = "allwinner,sun4i-a10-can";
reg = <0x01c2bc00 0x400>;
interrupts = <0 26 4>;
clocks = <&apb1_gates 4>;
status = "disabled";
};

Board specific .dts file:

can0: can@01c2bc00 {
pinctrl-names = "default";
pinctrl-0 = <&can0_pins_a>;
status = "okay";
};
7 changes: 7 additions & 0 deletions Documentation/devicetree/bindings/net/cpsw.txt
View file
Original file line number Diff line number Diff line change
Expand Up @@ -30,6 +30,13 @@ Optional properties:
- dual_emac : Specifies Switch to act as Dual EMAC
- syscon : Phandle to the system control device node, which is
the control module device of the am33x
- mode-gpios : Should be added if one/multiple gpio lines are
required to be driven so that cpsw data lines
can be connected to the phy via selective mux.
For example in dra72x-evm, pcf gpio has to be
driven low so that cpsw slave 0 and phy data
lines are connected via mux.


Slave Properties:
Required properties:
Expand Down
4 changes: 4 additions & 0 deletions Documentation/devicetree/bindings/net/fsl-tsec-phy.txt
View file
Original file line number Diff line number Diff line change
Expand Up @@ -57,6 +57,10 @@ Properties:
"rgmii-id", as all other connection types are detected by hardware.
- fsl,magic-packet : If present, indicates that the hardware supports
waking up via magic packet.
- fsl,wake-on-filer : If present, indicates that the hardware supports
waking up by Filer General Purpose Interrupt (FGPI) asserted on the
Rx int line. This is an advanced power management capability allowing
certain packet types (user) defined by filer rules to wake up the system.
- bd-stash : If present, indicates that the hardware supports stashing
buffer descriptors in the L2.
- rx-stash-len : Denotes the number of bytes of a received buffer to stash
Expand Down
4 changes: 2 additions & 2 deletions Documentation/devicetree/bindings/net/hisilicon-hip04-net.txt
View file
Original file line number Diff line number Diff line change
Expand Up @@ -32,13 +32,13 @@ Required properties:

Required properties:

- compatible: should be "hisilicon,hip04-mdio".
- compatible: should be "hisilicon,mdio".
- Inherits from MDIO bus node binding [2]
[2] Documentation/devicetree/bindings/net/phy.txt

Example:
mdio {
compatible = "hisilicon,hip04-mdio";
compatible = "hisilicon,mdio";
reg = <0x28f1000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
Expand Down
49 changes: 49 additions & 0 deletions Documentation/devicetree/bindings/net/hisilicon-hns-dsaf.txt
View file
Original file line number Diff line number Diff line change
@@ -0,0 +1,49 @@
Hisilicon DSA Fabric device controller

Required properties:
- compatible: should be "hisilicon,hns-dsaf-v1" or "hisilicon,hns-dsaf-v2".
"hisilicon,hns-dsaf-v1" is for hip05.
"hisilicon,hns-dsaf-v2" is for Hi1610 and Hi1612.
- dsa-name: dsa fabric name who provide this interface.
should be "dsafX", X is the dsaf id.
- mode: dsa fabric mode string. only support one of dsaf modes like these:
"2port-64vf",
"6port-16rss",
"6port-16vf".
- interrupt-parent: the interrupt parent of this device.
- interrupts: should contain the DSA Fabric and rcb interrupt.
- reg: specifies base physical address(es) and size of the device registers.
The first region is external interface control register base and size.
The second region is SerDes base register and size.
The third region is the PPE register base and size.
The fourth region is dsa fabric base register and size.
The fifth region is cpld base register and size, it is not required if do not use cpld.
- phy-handle: phy handle of physicl port, 0 if not any phy device. see ethernet.txt [1].
- buf-size: rx buffer size, should be 16-1024.
- desc-num: number of description in TX and RX queue, should be 512, 1024, 2048 or 4096.

[1] Documentation/devicetree/bindings/net/phy.txt

Example:

dsa: dsa@c7000000 {
compatible = "hisilicon,hns-dsaf-v1";
dsa_name = "dsaf0";
mode = "6port-16rss";
interrupt-parent = <&mbigen_dsa>;
reg = <0x0 0xC0000000 0x0 0x420000
0x0 0xC2000000 0x0 0x300000
0x0 0xc5000000 0x0 0x890000
0x0 0xc7000000 0x0 0x60000>;
phy-handle = <0 0 0 0 &soc0_phy4 &soc0_phy5 0 0>;
interrupts = <131 4>,<132 4>, <133 4>,<134 4>,
<135 4>,<136 4>, <137 4>,<138 4>,
<139 4>,<140 4>, <141 4>,<142 4>,
<143 4>,<144 4>, <145 4>,<146 4>,
<147 4>,<148 4>, <384 1>,<385 1>,
<386 1>,<387 1>, <388 1>,<389 1>,
<390 1>,<391 1>,
buf-size = <4096>;
desc-num = <1024>;
dma-coherent;
};
22 changes: 22 additions & 0 deletions Documentation/devicetree/bindings/net/hisilicon-hns-mdio.txt
View file
Original file line number Diff line number Diff line change
@@ -0,0 +1,22 @@
Hisilicon MDIO bus controller

Properties:
- compatible: "hisilicon,mdio","hisilicon,hns-mdio".
- reg: The base address of the MDIO bus controller register bank.
- #address-cells: Must be <1>.
- #size-cells: Must be <0>. MDIO addresses have no size component.

Typically an MDIO bus might have several children.

Example:
mdio@803c0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "hisilicon,hns-mdio","hisilicon,mdio";
reg = <0x0 0x803c0000 0x0 0x10000>;

ethernet-phy@0 {
...
reg = <0>;
};
};
47 changes: 47 additions & 0 deletions Documentation/devicetree/bindings/net/hisilicon-hns-nic.txt
View file
Original file line number Diff line number Diff line change
@@ -0,0 +1,47 @@
Hisilicon Network Subsystem NIC controller

Required properties:
- compatible: "hisilicon,hns-nic-v1" or "hisilicon,hns-nic-v2".
"hisilicon,hns-nic-v1" is for hip05.
"hisilicon,hns-nic-v2" is for Hi1610 and Hi1612.
- ae-name: accelerator name who provides this interface,
is simply a name referring to the name of name in the accelerator node.
- port-id: is the index of port provided by DSAF (the accelerator). DSAF can
connect to 8 PHYs. Port 0 to 1 are both used for adminstration purpose. They
are called debug ports.

The remaining 6 PHYs are taken according to the mode of DSAF.

In NIC mode of DSAF, all 6 PHYs are taken as ethernet ports to the CPU. The
port-id can be 2 to 7. Here is the diagram:
+-----+---------------+
| CPU |
+-+-+-+---+-+-+-+-+-+-+
| | | | | | | |
debug service
port port
(0,1) (2-7)

In Switch mode of DSAF, all 6 PHYs are taken as physical ports connect to a
LAN Switch while the CPU side assume itself have one single NIC connect to
this switch. In this case, the port-id will be 2 only.
+-----+---------------+
| CPU |
+-+-+-+---+-+-+-+-+-+-+
| | service| port(2)
debug +------------+
port | switch |
(0,1) +-+-+-+-+-+-++
| | | | | |
external port

- local-mac-address: mac addr of the ethernet interface

Example:

ethernet@0{
compatible = "hisilicon,hns-nic-v1";
ae-name = "dsaf0";
port-id = <0>;
local-mac-address = [a2 14 e4 4b 56 76];
};
20 changes: 20 additions & 0 deletions Documentation/devicetree/bindings/net/ieee802154/mrf24j40.txt
View file
Original file line number Diff line number Diff line change
@@ -0,0 +1,20 @@
* MRF24J40 IEEE 802.15.4 *

Required properties:
- compatible: should be "microchip,mrf24j40", "microchip,mrf24j40ma",
or "microchip,mrf24j40mc" depends on your transceiver
board
- spi-max-frequency: maximal bus speed, should be set something under or equal
10000000
- reg: the chipselect index
- interrupts: the interrupt generated by the device.

Example:

mrf24j40ma@0 {
compatible = "microchip,mrf24j40ma";
spi-max-frequency = <8500000>;
reg = <0>;
interrupts = <19 8>;
interrupt-parent = <&gpio3>;
};
61 changes: 59 additions & 2 deletions Documentation/devicetree/bindings/net/nfc/nfcmrvl.txt
View file
Original file line number Diff line number Diff line change
@@ -1,7 +1,10 @@
* Marvell International Ltd. NCI NFC Controller

Required properties:
- compatible: Should be "mrvl,nfc-uart".
- compatible: Should be:
- "marvell,nfc-uart" or "mrvl,nfc-uart" for UART devices
- "marvell,nfc-i2c" for I2C devices
- "marvell,nfc-spi" for SPI devices

Optional SoC specific properties:
- pinctrl-names: Contains only one value - "default".
Expand All @@ -13,17 +16,71 @@ Optional UART-based chip specific properties:
- flow-control: Specifies that the chip is using RTS/CTS.
- break-control: Specifies that the chip needs specific break management.

Optional I2C-based chip specific properties:
- i2c-int-falling: Specifies that the chip read event shall be trigged on
falling edge.
- i2c-int-rising: Specifies that the chip read event shall be trigged on
rising edge.

Example (for ARM-based BeagleBoard Black with 88W8887 on UART5):

&uart5 {
status = "okay";

nfcmrvluart: nfcmrvluart@5 {
compatible = "mrvl,nfc-uart";
compatible = "marvell,nfc-uart";

reset-n-io = <&gpio3 16 0>;

hci-muxed;
flow-control;
}
};


Example (for ARM-based BeagleBoard Black with 88W8887 on I2C1):

&i2c1 {
status = "okay";
clock-frequency = <400000>;

nfcmrvli2c0: i2c@1 {
compatible = "marvell,nfc-i2c";

reg = <0x8>;

/* I2C INT configuration */
interrupt-parent = <&gpio3>;
interrupts = <21 0>;

/* I2C INT trigger configuration */
i2c-int-rising;

/* Reset IO */
reset-n-io = <&gpio3 19 0>;
};
};


Example (for ARM-based BeagleBoard Black on SPI0):

&spi0 {

mrvlnfcspi0: spi@0 {
compatible = "marvell,nfc-spi";

reg = <0>;

/* SPI Bus configuration */
spi-max-frequency = <3000000>;
spi-cpha;
spi-cpol;

/* SPI INT configuration */
interrupt-parent = <&gpio1>;
interrupts = <17 0>;

/* Reset IO */
reset-n-io = <&gpio3 19 0>;
};
};
7 changes: 7 additions & 0 deletions Documentation/devicetree/bindings/net/nfc/st-nci-i2c.txt
View file
Original file line number Diff line number Diff line change
Expand Up @@ -11,6 +11,10 @@ Required properties:
Optional SoC Specific Properties:
- pinctrl-names: Contains only one value - "default".
- pintctrl-0: Specifies the pin control groups used for this controller.
- ese-present: Specifies that an ese is physically connected to the nfc
controller.
- uicc-present: Specifies that the uicc swp signal can be physically
connected to the nfc controller.

Example (for ARM-based BeagleBoard xM with ST21NFCB on I2C2):

Expand All @@ -29,5 +33,8 @@ Example (for ARM-based BeagleBoard xM with ST21NFCB on I2C2):
interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;

reset-gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>;

ese-present;
uicc-present;
};
};
Loading

0 comments on commit b0f85fa

Please sign in to comment.