Xilinx FPGA PCIe 保姆级教程 ——基于 PCIe XDMA IP核

cocotb: Python-based chip (RTL) verification

animate an SVG with a VCD file

《数据结构》算法模拟动画

机器学习、深度学习、自然语言处理等人工智能基础知识总结。

🎨 ML Visuals contains figures and templates which you can reuse and customize to improve your scientific writing.

A huge collection of VHDL/Verilog open-source IP cores scraped from the web

VSCode插件：自动生成，自动更新VSCode文件头部注释, 自动生成函数注释并支持提取函数参数，支持所有主流语言，文档齐全，使用简单，配置灵活方便，持续维护多年。

🌊 Digital timing diagram rendering engine

Scalable Network Stack for FPGAs (TCP/IP, RoCEv2)

分享FPGA开发知识、优秀文章、学习网站以及开源项目。本项目收集了github中许多FPGA开源项目。

Open Source 4k CSI-2 Rx core for Xilinx FPGAs

提取微信聊天记录，将其导出成HTML、Word、Excel文档永久保存，对聊天记录进行分析生成年度聊天报告，用聊天数据训练专属于个人的AI聊天助手

Image Signal Processing (ISP) Guide. Learn all about the process of converting an image/video into digital form by performing tasks like noise reduction, filtering, auto exposure, autofocus, HDR co…

An FPGA-based USB 1.1 (full-speed) device core to implement USB-serial, USB-camera, USB-audio, USB-hid, etc. It requires only 3 FPGA common IOs rather than additional chips. 基于FPGA的USB 1.1 (full-sp…

《机器学习》（西瓜书）公式详解

《Hello 算法》：动画图解、一键运行的数据结构与算法教程。支持 Python, Java, C++, C, C#, JS, Go, Swift, Rust, Ruby, Kotlin, TS, Dart 代码。简体版和繁体版同步更新，English version ongoing

Event-based Vision Resources. Community effort to collect knowledge on event-based vision technology (papers, workshops, datasets, code, videos, etc)

MIPI CSI-2 Camera Sensor Receiver verilog HDL implementation For any generic FPGA. Tested with IMX219 on Lattice MachXO3LF. 2Gbps UVC Video Stream Over USB 3.0 with Cypress FX3. This is now Legacy …

Source and Documentation files for USB C Industrial Camera Project, This repo contains PCB boards, FPGA , Camera and USB along with FPGA Firmware and USB Controller Firmware source.

MIPI CSI-2 + MIPI CCS Demo

👔 A collection of cv and resume templates written in LaTeX. Leave an issue if your language is not supported!

XeLaTeX中文简历

🚛 Awesome CAN bus tools, hardware and resources for Cyber Security Researchers, Reverse Engineers, and Automotive Electronics Enthusiasts.

This is a mirror repository for official CTU CAN FD repository:

A FPGA friendly 32 bit RISC-V CPU implementation

Deprecated, please go to next generation Ultra-Low Power RISC-V Core https://github.com/riscv-mcu/e203_hbirdv2

An FPGA-based lightweight CAN bus controller. 基于FPGA的轻量级CAN总线控制器。

电阻凑算

我设计的一个HDMI转MIPI模块，可以用于驱动各种手机屏幕当显示器用。