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ARM: dts: imx: Add support for DH electronics i.MX8M Plus DHCOM and PDK2
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Add support for DH electronics i.MX8M Plus DHCOM SoM on PDK2 carrier board.
Currently supported are serial console, EQoS and FEC ethernets, eMMC, SD,
SPI NOR and USB 3.0 host.

Signed-off-by: Marek Vasut <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Peng Fan <[email protected]>
Cc: Stefano Babic <[email protected]>
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@sbabic
Marek Vasut authored and sbabic committed May 23, 2022
1 parent 0539d16 commit 4d573d5
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1 change: 1 addition & 0 deletions arch/arm/dts/Makefile
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Expand Up @@ -939,6 +939,7 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mn-beacon-kit.dtb \
imx8mq-mnt-reform2.dtb \
imx8mq-phanbell.dtb \
imx8mp-dhcom-pdk2.dtb \
imx8mp-evk.dtb \
imx8mp-phyboard-pollux-rdk.dtb \
imx8mp-venice.dtb \
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141 changes: 141 additions & 0 deletions arch/arm/dts/imx8mp-dhcom-pdk2-u-boot.dtsi
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2022 Marek Vasut <[email protected]>
*/

#include "imx8mp-u-boot.dtsi"

/ {
aliases {
eeprom0 = &eeprom0;
eeprom1 = &eeprom1;
mmc0 = &usdhc2; /* MicroSD */
mmc1 = &usdhc3; /* eMMC */
mmc2 = &usdhc1; /* SDIO */
};

config {
dh,ram-coding-gpios = <&gpio3 22 0>, <&gpio3 23 0>, <&gpio3 24 0>;
};

wdt-reboot {
compatible = "wdt-reboot";
wdt = <&wdog1>;
u-boot,dm-spl;
};
};

&buck4 {
u-boot,dm-spl;
};

&buck5 {
u-boot,dm-spl;
};

&eqos {
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
/delete-property/ assigned-clock-rates;
};

&gpio1 {
u-boot,dm-spl;
};

&gpio2 {
u-boot,dm-spl;
};

&gpio3 {
u-boot,dm-spl;
};

&gpio4 {
u-boot,dm-spl;
};

&gpio5 {
u-boot,dm-spl;
};

&i2c3 {
u-boot,dm-spl;
};

&pinctrl_i2c3 {
u-boot,dm-spl;
};

&pinctrl_i2c3_gpio {
u-boot,dm-spl;
};

&pinctrl_pmic {
u-boot,dm-spl;
};

&pinctrl_uart1 {
u-boot,dm-spl;
};

&pinctrl_usdhc2 {
u-boot,dm-spl;
};

&pinctrl_usdhc2_100mhz {
u-boot,dm-spl;
};

&pinctrl_usdhc2_200mhz {
u-boot,dm-spl;
};

&pinctrl_usdhc2_vmmc {
u-boot,dm-spl;
};

&pinctrl_usdhc3 {
u-boot,dm-spl;
};

&pinctrl_usdhc3_100mhz {
u-boot,dm-spl;
};

&pinctrl_usdhc3_100mhz {
u-boot,dm-spl;
};

&pmic {
u-boot,dm-spl;

regulators {
u-boot,dm-spl;
};
};

&reg_usdhc2_vmmc {
u-boot,dm-spl;
};

&uart1 {
u-boot,dm-spl;
};

/* SDIO WiFi */
&usdhc1 {
status = "disabled";
};

&usdhc2 {
u-boot,dm-spl;
};

&usdhc3 {
u-boot,dm-spl;
};

&wdog1 {
u-boot,dm-spl;
};
152 changes: 152 additions & 0 deletions arch/arm/dts/imx8mp-dhcom-pdk2.dts
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2022 Marek Vasut <[email protected]>
*/

/dts-v1/;

#include <dt-bindings/leds/common.h>
#include <dt-bindings/net/qca-ar803x.h>
#include <dt-bindings/phy/phy-imx8-pcie.h>
#include "imx8mp-dhcom-som.dtsi"

/ {
model = "DH electronics i.MX8M Plus DHCOM Premium Developer Kit (2)";
compatible = "dh,imx8mp-dhcom-pdk2", "fsl,imx8mp";

chosen {
stdout-path = &uart1;
};

gpio-keys {
#size-cells = <0>;
compatible = "gpio-keys";

button-0 {
gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; /* GPIO A */
label = "TA1-GPIO-A";
linux,code = <KEY_A>;
pinctrl-0 = <&pinctrl_dhcom_a>;
pinctrl-names = "default";
wakeup-source;
};

button-1 {
gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; /* GPIO B */
label = "TA2-GPIO-B";
linux,code = <KEY_B>;
pinctrl-0 = <&pinctrl_dhcom_b>;
pinctrl-names = "default";
wakeup-source;
};

button-2 {
gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; /* GPIO C */
label = "TA3-GPIO-C";
linux,code = <KEY_C>;
pinctrl-0 = <&pinctrl_dhcom_c>;
pinctrl-names = "default";
wakeup-source;
};

button-3 {
gpios = <&gpio4 27 GPIO_ACTIVE_LOW>; /* GPIO D */
label = "TA4-GPIO-D";
linux,code = <KEY_D>;
pinctrl-0 = <&pinctrl_dhcom_d>;
pinctrl-names = "default";
wakeup-source;
};
};

led {
compatible = "gpio-leds";

led-5 {
color = <LED_COLOR_ID_GREEN>;
default-state = "off";
function = LED_FUNCTION_INDICATOR;
gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>; /* GPIO E */
pinctrl-0 = <&pinctrl_dhcom_e>;
pinctrl-names = "default";
};

led-6 {
color = <LED_COLOR_ID_GREEN>;
default-state = "off";
function = LED_FUNCTION_INDICATOR;
gpios = <&gpio5 23 GPIO_ACTIVE_HIGH>; /* GPIO F */
pinctrl-0 = <&pinctrl_dhcom_f>;
pinctrl-names = "default";
};

led-7 {
color = <LED_COLOR_ID_GREEN>;
default-state = "off";
function = LED_FUNCTION_INDICATOR;
gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>; /* GPIO H */
pinctrl-0 = <&pinctrl_dhcom_h>;
pinctrl-names = "default";
};

led-8 {
color = <LED_COLOR_ID_GREEN>;
default-state = "off";
function = LED_FUNCTION_INDICATOR;
gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; /* GPIO I */
pinctrl-0 = <&pinctrl_dhcom_i>;
pinctrl-names = "default";
};
};
};

/*
* PDK2 carrier board uses SoM with KSZ9131 populated and connected to
* SoM EQoS ethernet RGMII interface. Remove the other SoM PHY DT node.
*/
/delete-node/ &ethphy0f;

/*
* PDK2 carrier board has KSZ9021 PHY populated and connected to SoM FEC
* ethernet RGMII interface. The SoM is not populated with second FEC PHY.
*/
/delete-node/ &ethphy1f;

&fec { /* Second ethernet */
phy-handle = <&ethphypdk>;

mdio {
ethphypdk: ethernet-phy@7 { /* KSZ 9021 */
compatible = "ethernet-phy-ieee802.3-c22";
interrupt-parent = <&gpio4>;
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
pinctrl-0 = <&pinctrl_ethphy1>;
pinctrl-names = "default";
reg = <7>;
reset-assert-us = <1000>;
reset-deassert-us = <1000>;
reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
rxc-skew-ps = <3000>;
rxd0-skew-ps = <0>;
rxd1-skew-ps = <0>;
rxd2-skew-ps = <0>;
rxd3-skew-ps = <0>;
rxdv-skew-ps = <0>;
txc-skew-ps = <3000>;
txd0-skew-ps = <0>;
txd1-skew-ps = <0>;
txd2-skew-ps = <0>;
txd3-skew-ps = <0>;
txen-skew-ps = <0>;
max-speed = <100>;
};
};
};

&flexcan1 {
status = "okay";
};

&usb3_1 {
fsl,over-current-active-low;
};
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