Makfile: move suffix rules to Makefile.build

This commit moves suffix rules from config.mk
to scripts/Makefile.build, which will allow us
to switch smoothly to real Kbuild.

Note1:
post/lib_powerpc/fpu/Makefile has
its own rule to compile C sources.
We need to tweak it to keep the same behavior.

Note2:
There are two file2 with the same name:
arch/arm/lib/crt0.S and eamples/api/crt0.S.
To keep the same build behavior,
examples/api/Makefile also has to be treaked.

Signed-off-by: Masahiro Yamada <[email protected]>

config.mk

@@ -318,38 +318,3 @@ endif
 export	HOSTCC HOSTCFLAGS HOSTLDFLAGS CROSS_COMPILE \
 	AS LD CC CPP AR NM STRIP OBJCOPY OBJDUMP MAKE
 export	CONFIG_SYS_TEXT_BASE PLATFORM_CPPFLAGS PLATFORM_RELFLAGS CPPFLAGS CFLAGS AFLAGS
-
-#########################################################################
-
-# Allow boards to use custom optimize flags on a per dir/file basis
-ALL_AFLAGS = $(AFLAGS) $(AFLAGS_$(BCURDIR)/$(@F)) $(AFLAGS_$(BCURDIR))
-ALL_CFLAGS = $(CFLAGS) $(CFLAGS_$(BCURDIR)/$(@F)) $(CFLAGS_$(BCURDIR))
-EXTRA_CPPFLAGS = $(CPPFLAGS_$(BCURDIR)/$(@F)) $(CPPFLAGS_$(BCURDIR))
-ALL_CFLAGS += $(EXTRA_CPPFLAGS)
-
-# The _DEP version uses the $< file target (for dependency generation)
-# See rules.mk
-EXTRA_CPPFLAGS_DEP = $(CPPFLAGS_$(BCURDIR)/$(addsuffix .o,$(basename $<))) \
-		$(CPPFLAGS_$(BCURDIR))
-$(obj)%.s:	%.S
-	$(CPP) $(ALL_AFLAGS) -o $@ $<
-$(obj)%.o:	%.S
-	$(CC)  $(ALL_AFLAGS) -o $@ $< -c
-$(obj)%.o:	%.c
-ifneq ($(CHECKSRC),0)
-	$(CHECK) $(CHECKFLAGS) $(ALL_CFLAGS) $<
-endif
-	$(CC)  $(ALL_CFLAGS) -o $@ $< -c
-$(obj)%.i:	%.c
-	$(CPP) $(ALL_CFLAGS) -o $@ $< -c
-$(obj)%.s:	%.c
-	$(CC)  $(ALL_CFLAGS) -o $@ $< -c -S
-
-#########################################################################
-
-# If the list of objects to link is empty, just create an empty built-in.o
-cmd_link_o_target = $(if $(strip $1),\
-		      $(LD) $(LDFLAGS) -r -o $@ $1,\
-		      rm -f $@; $(AR) rcs $@ )
-
-#########################################################################

examples/api/Makefile

@@ -50,9 +50,9 @@ $(obj)demo.bin: $(obj)demo
 		$(OBJCOPY) -O binary $< $@ 2>/dev/null
 
 # Rule to build generic library C files
-$(obj)%.o: $(SRCTREE)/lib/%.c
+$(addprefix $(obj),$(notdir $(EXT_COBJ_FILES-y))): $(obj)%.o: $(SRCTREE)/lib/%.c
 	$(CC) -g $(CFLAGS) -c -o $@ $<
 
 # Rule to build architecture-specific library assembly files
-$(obj)%.o: $(SRCTREE)/arch/$(ARCH)/lib/%.S
+$(addprefix $(obj),$(notdir $(EXT_SOBJ_FILES-y))): $(obj)%.o: $(SRCTREE)/arch/$(ARCH)/lib/%.S
 	$(CC) -g $(CFLAGS) -c -o $@ $<

post/lib_powerpc/fpu/Makefile

@@ -18,7 +18,7 @@ obj-y	+= darwin-ldouble.o
 CFLAGS := $(shell echo $(CFLAGS) | sed s/-msoft-float//)
 CFLAGS += -mhard-float -fkeep-inline-functions
 
-$(obj)%.o:	%.c
+$(addprefix $(obj),$(obj-y)): $(obj)%.o:	%.c
 	$(CC)  $(ALL_CFLAGS) -o $@.fp $< -c
 	$(OBJCOPY) -R .gnu.attributes $@.fp $@
 	rm -f $@.fp

scripts/Makefile.build

@@ -67,6 +67,37 @@ endif
 
 #########################################################################
 
+# Allow boards to use custom optimize flags on a per dir/file basis
+ALL_AFLAGS = $(AFLAGS) $(AFLAGS_$(BCURDIR)/$(@F)) $(AFLAGS_$(BCURDIR))
+ALL_CFLAGS = $(CFLAGS) $(CFLAGS_$(BCURDIR)/$(@F)) $(CFLAGS_$(BCURDIR))
+EXTRA_CPPFLAGS = $(CPPFLAGS_$(BCURDIR)/$(@F)) $(CPPFLAGS_$(BCURDIR))
+ALL_CFLAGS += $(EXTRA_CPPFLAGS)
+
+# The _DEP version uses the $< file target (for dependency generation)
+# See rules.mk
+EXTRA_CPPFLAGS_DEP = $(CPPFLAGS_$(BCURDIR)/$(addsuffix .o,$(basename $<))) \
+		$(CPPFLAGS_$(BCURDIR))
+$(obj)%.s:	%.S
+	$(CPP) $(ALL_AFLAGS) -o $@ $<
+$(obj)%.o:	%.S
+	$(CC)  $(ALL_AFLAGS) -o $@ $< -c
+$(obj)%.o:	%.c
+ifneq ($(CHECKSRC),0)
+	$(CHECK) $(CHECKFLAGS) $(ALL_CFLAGS) $<
+endif
+	$(CC)  $(ALL_CFLAGS) -o $@ $< -c
+$(obj)%.i:	%.c
+	$(CPP) $(ALL_CFLAGS) -o $@ $< -c
+$(obj)%.s:	%.c
+	$(CC)  $(ALL_CFLAGS) -o $@ $< -c -S
+
+# If the list of objects to link is empty, just create an empty built-in.o
+cmd_link_o_target = $(if $(strip $1),\
+		      $(LD) $(LDFLAGS) -r -o $@ $1,\
+		      rm -f $@; $(AR) rcs $@ )
+
+#########################################################################
+
 # defines $(obj).depend target
 
 include $(TOPDIR)/rules.mk