dts: mvebu: a80x0: Enable SD/eMMC interfaces

Enable SDHCI interface on AP and CP0 in A80x0 DTS files Signed-off-by: Konstantin Porotchkin <[email protected]> Reviewed-by: Stefan Roese <[email protected]> Signed-off-by: Evan Wang <[email protected]> Signed-off-by: Stefan Roese <[email protected]>
imaami · May 29, 2018 · 61dccf7 · 61dccf7
1 parent f5db597
commit 61dccf7
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diff --git a/arch/arm/dts/armada-8040-db.dts b/arch/arm/dts/armada-8040-db.dts
@@ -81,6 +81,13 @@
 		     1 3 0 0 0 0 0 0 0 3 >;
 };
 
+&ap_sdhci0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&ap_emmc_pins>;
+	bus-width = <8>;
+	status = "okay";
+};
+
 &cpm_pinctl {
 	/* MPP Bus:
 	 *	[0-31]	= 0xff: Keep default CP0_shared_pins
@@ -182,6 +189,13 @@
 	status = "okay";
 };
 
+&cpm_sdhci0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&cpm_sdhci_pins>;
+	bus-width = <4>;
+	status = "okay";
+};
+
 &cps_pinctl {
 	/* MPP Bus:
 	 *	[0-11]	RGMII0

diff --git a/arch/arm/dts/armada-8040-mcbin.dts b/arch/arm/dts/armada-8040-mcbin.dts
@@ -154,6 +154,14 @@
 	status = "okay";
 };
 
+/* uSD slot */
+&cpm_sdhci0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&cpm_sdhci_pins>;
+	bus-width = <4>;
+	status = "okay";
+};
+
 &cpm_comphy {
 	/*
 	 * CP0 Serdes Configuration: