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crypto: caam: Add CAAM support to i.MX8M platforms
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This patch enable CAAM support for i.MX8M platforms.

Signed-off-by: Aymen Sghaier <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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ksghaier authored and sbabic committed Apr 8, 2021
1 parent 88e7f5b commit 940d36d
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Showing 4 changed files with 16 additions and 5 deletions.
3 changes: 3 additions & 0 deletions arch/arm/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -839,6 +839,9 @@ config ARCH_IMX8
config ARCH_IMX8M
bool "NXP i.MX8M platform"
select ARM64
select SYS_FSL_HAS_SEC if IMX_HAB
select SYS_FSL_SEC_COMPAT_4
select SYS_FSL_SEC_LE
select DM
select SUPPORT_SPL
imply CMD_DM
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1 change: 1 addition & 0 deletions arch/arm/mach-imx/imx8m/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -2,6 +2,7 @@ if ARCH_IMX8M

config IMX8M
bool
select HAS_CAAM
select ROM_UNIFIED_SECTIONS

config IMX8MQ
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4 changes: 3 additions & 1 deletion drivers/crypto/fsl/jobdesc.c
Original file line number Diff line number Diff line change
Expand Up @@ -4,6 +4,7 @@
* Basic job descriptor construction
*
* Copyright 2014 Freescale Semiconductor, Inc.
* Copyright 2018 NXP
*
*/

Expand All @@ -15,7 +16,8 @@
#include "rsa_caam.h"
#include <asm/cache.h>

#if defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_MX7ULP)
#if defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_MX7ULP) || \
defined(CONFIG_IMX8M)
/*!
* Secure memory run command
*
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13 changes: 9 additions & 4 deletions include/fsl_sec.h
Original file line number Diff line number Diff line change
Expand Up @@ -3,6 +3,7 @@
* Common internal memory map for some Freescale SoCs
*
* Copyright 2014 Freescale Semiconductor, Inc.
* Copyright 2018 NXP
*/

#ifndef __FSL_SEC_H
Expand Down Expand Up @@ -195,7 +196,8 @@ typedef struct ccsr_sec {

struct jr_regs {
#if defined(CONFIG_SYS_FSL_SEC_LE) && \
!(defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_MX7ULP))
!(defined(CONFIG_MX6) || defined(CONFIG_MX7) || \
defined(CONFIG_MX7ULP) || defined(CONFIG_IMX8M))
u32 irba_l;
u32 irba_h;
#else
Expand All @@ -209,7 +211,8 @@ struct jr_regs {
u32 rsvd3;
u32 irja;
#if defined(CONFIG_SYS_FSL_SEC_LE) && \
!(defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_MX7ULP))
!(defined(CONFIG_MX6) || defined(CONFIG_MX7) || \
defined(CONFIG_MX7ULP) || defined(CONFIG_IMX8M))
u32 orba_l;
u32 orba_h;
#else
Expand Down Expand Up @@ -242,7 +245,8 @@ struct jr_regs {
*/
struct sg_entry {
#if defined(CONFIG_SYS_FSL_SEC_LE) && \
!(defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_MX7ULP))
!(defined(CONFIG_MX6) || defined(CONFIG_MX7) || \
defined(CONFIG_MX7ULP) || defined(CONFIG_IMX8M))
uint32_t addr_lo; /* Memory Address - lo */
uint32_t addr_hi; /* Memory Address of start of buffer - hi */
#else
Expand All @@ -263,7 +267,8 @@ struct sg_entry {

#define BLOB_SIZE(x) ((x) + 32 + 16) /* Blob buffer size */

#if defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_MX7ULP)
#if defined(CONFIG_MX6) || defined(CONFIG_MX7) || \
defined(CONFIG_MX7ULP) || defined(CONFIG_IMX8M)
/* Job Ring Base Address */
#define JR_BASE_ADDR(x) (CONFIG_SYS_FSL_SEC_ADDR + 0x1000 * (x + 1))
/* Secure Memory Offset varies accross versions */
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