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- Add xtxtech spi-nor chip parts (Bruce Suen) - Add bcm63xx-hsspi driver fixes (William Zhang)
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# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause | ||
%YAML 1.2 | ||
--- | ||
$id: http://devicetree.org/schemas/spi/brcm,bcm63xx-hsspi.yaml# | ||
$schema: http://devicetree.org/meta-schemas/core.yaml# | ||
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title: Broadcom Broadband SoC High Speed SPI controller | ||
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maintainers: | ||
- William Zhang <[email protected]> | ||
- Kursad Oney <[email protected]> | ||
- Jonas Gorski <[email protected]> | ||
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description: | | ||
Broadcom Broadband SoC supports High Speed SPI master controller since the | ||
early MIPS based chips such as BCM6328 and BCM63268. This initial rev 1.0 | ||
controller was carried over to recent ARM based chips, such as BCM63138, | ||
BCM4908 and BCM6858. The old MIPS based chip should continue to use the | ||
brcm,bcm6328-hsspi compatible string. The recent ARM based chip is required to | ||
use the brcm,bcmbca-hsspi-v1.0 as part of its compatible string list as | ||
defined below to match the specific chip along with ip revision info. | ||
This rev 1.0 controller has a limitation that can not keep the chip select line | ||
active between the SPI transfers within the same SPI message. This can | ||
terminate the transaction to some SPI devices prematurely. The issue can be | ||
worked around by either the controller's prepend mode or using the dummy chip | ||
select workaround. Driver automatically picks the suitable mode based on | ||
transfer type so it is transparent to the user. | ||
The newer SoCs such as BCM6756, BCM4912 and BCM6855 include an updated SPI | ||
controller rev 1.1 that add the capability to allow the driver to control chip | ||
select explicitly. This solves the issue in the old controller. | ||
properties: | ||
compatible: | ||
oneOf: | ||
- const: brcm,bcm6328-hsspi | ||
- items: | ||
- enum: | ||
- brcm,bcm47622-hsspi | ||
- brcm,bcm4908-hsspi | ||
- brcm,bcm63138-hsspi | ||
- brcm,bcm63146-hsspi | ||
- brcm,bcm63148-hsspi | ||
- brcm,bcm63158-hsspi | ||
- brcm,bcm63178-hsspi | ||
- brcm,bcm6846-hsspi | ||
- brcm,bcm6856-hsspi | ||
- brcm,bcm6858-hsspi | ||
- brcm,bcm6878-hsspi | ||
- const: brcm,bcmbca-hsspi-v1.0 | ||
- items: | ||
- enum: | ||
- brcm,bcm4912-hsspi | ||
- brcm,bcm6756-hsspi | ||
- brcm,bcm6813-hsspi | ||
- brcm,bcm6855-hsspi | ||
- const: brcm,bcmbca-hsspi-v1.1 | ||
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reg: | ||
items: | ||
- description: main registers | ||
- description: miscellaneous control registers | ||
minItems: 1 | ||
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reg-names: | ||
items: | ||
- const: hsspi | ||
- const: spim-ctrl | ||
minItems: 1 | ||
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clocks: | ||
items: | ||
- description: SPI master reference clock | ||
- description: SPI master pll clock | ||
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clock-names: | ||
items: | ||
- const: hsspi | ||
- const: pll | ||
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interrupts: | ||
maxItems: 1 | ||
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required: | ||
- compatible | ||
- reg | ||
- clocks | ||
- clock-names | ||
- interrupts | ||
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allOf: | ||
- $ref: spi-controller.yaml# | ||
- if: | ||
properties: | ||
compatible: | ||
contains: | ||
enum: | ||
- brcm,bcm6328-hsspi | ||
- brcm,bcmbca-hsspi-v1.0 | ||
then: | ||
properties: | ||
reg: | ||
maxItems: 1 | ||
reg-names: | ||
maxItems: 1 | ||
else: | ||
properties: | ||
reg: | ||
minItems: 2 | ||
maxItems: 2 | ||
reg-names: | ||
minItems: 2 | ||
maxItems: 2 | ||
required: | ||
- reg-names | ||
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unevaluatedProperties: false | ||
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examples: | ||
- | | ||
#include <dt-bindings/interrupt-controller/arm-gic.h> | ||
spi@ff801000 { | ||
compatible = "brcm,bcm6756-hsspi", "brcm,bcmbca-hsspi-v1.1"; | ||
reg = <0xff801000 0x1000>, | ||
<0xff802610 0x4>; | ||
reg-names = "hsspi", "spim-ctrl"; | ||
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; | ||
clocks = <&hsspi>, <&hsspi_pll>; | ||
clock-names = "hsspi", "pll"; | ||
num-cs = <8>; | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
}; |
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