Seamless operability between C++11 and Python

Embedded Template Library

A repository for SystemC Learning examples

Source code for the book Real-Time C++, by Christopher Kormanyos

Boost.org mpl module

training labs and examples

Adds support for creating state machines for attributes on any Ruby class

Reference examples and short projects using UVM Methodology

Learn systemC with examples

Code samples for C++ Concurrency in Action

Core SystemC Library

This tool translates synthesizable SystemC code to synthesizable SystemVerilog.

SystemRDL 2.0 language compiler front-end

UVM 1.2 port to Python

A refreshed Python toolbox for building complex digital hardware

A generic class library in SystemVerilog

A fast and scalable x86-64 multicore simulator

C++ Metaprogramming library enabling better static checking and register abstraction in embedded software

The Python code to reproduce the illustrations from The Hundred-Page Machine Learning Book.

A portable single header C++ fiber function library for co-operative multitasking

APB VIP (UVM)

System verilog register model for uvm testbenches.

implement PCIE devices using C or VHDL and test them against a QEMU virtualized architecture

yet another AXI testbench repo. ;) This is for my UVM practice. https://marcoz001.github.io/axi-uvm/

APB4 Multiplexor

Examples and reference for System Verilog Assertions

PHY wrappers for LitePCIe