Skip to content

Commit

Permalink
rtl838x: dts: use macros for phy and switch definitions
Browse files Browse the repository at this point in the history
It's quite more readable, saves some tedious copy&pasting, not so
error prone etc.

Signed-off-by: Petr Štetiar <[email protected]>
  • Loading branch information
ynezz committed Nov 9, 2020
1 parent 0516aa3 commit e267445
Show file tree
Hide file tree
Showing 5 changed files with 170 additions and 719 deletions.
111 changes: 16 additions & 95 deletions target/linux/rtl838x/dts/rtl8382_allnet_all-sg8208m.dts
Original file line number Diff line number Diff line change
Expand Up @@ -103,46 +103,14 @@
#address-cells = <1>;
#size-cells = <0>;

/* Internal phy */
phy8: ethernet-phy@8 {
reg = <8>;
compatible = "ethernet-phy-ieee802.3-c22";
};

phy9: ethernet-phy@9 {
reg = <9>;
compatible = "ethernet-phy-ieee802.3-c22";
};

phy10: ethernet-phy@10 {
reg = <10>;
compatible = "ethernet-phy-ieee802.3-c22";
};

phy11: ethernet-phy@11 {
reg = <11>;
compatible = "ethernet-phy-ieee802.3-c22";
};

phy12: ethernet-phy@12 {
reg = <12>;
compatible = "ethernet-phy-ieee802.3-c22";
};

phy13: ethernet-phy@13 {
reg = <13>;
compatible = "ethernet-phy-ieee802.3-c22";
};

phy14: ethernet-phy@14 {
reg = <14>;
compatible = "ethernet-phy-ieee802.3-c22";
};

phy15: ethernet-phy@15 {
reg = <15>;
compatible = "ethernet-phy-ieee802.3-c22";
};
INTERNAL_PHY(8)
INTERNAL_PHY(9)
INTERNAL_PHY(10)
INTERNAL_PHY(11)
INTERNAL_PHY(12)
INTERNAL_PHY(13)
INTERNAL_PHY(14)
INTERNAL_PHY(15)
};
};

Expand All @@ -151,61 +119,14 @@
#address-cells = <1>;
#size-cells = <0>;

port@0 {
reg = <8>;
label = "lan1";
phy-handle = <&phy8>;
phy-mode = "internal";
};

port@1 {
reg = <9>;
label = "lan2";
phy-handle = <&phy9>;
phy-mode = "internal";
};

port@2 {
reg = <10>;
label = "lan3";
phy-handle = <&phy10>;
phy-mode = "internal";
};

port@3 {
reg = <11>;
label = "lan4";
phy-handle = <&phy11>;
phy-mode = "internal";
};

port@4 {
reg = <12>;
label = "lan5";
phy-handle = <&phy12>;
phy-mode = "internal";
};

port@5 {
reg = <13>;
label = "lan6";
phy-handle = <&phy13>;
phy-mode = "internal";
};

port@6 {
reg = <14>;
label = "lan7";
phy-handle = <&phy14>;
phy-mode = "internal";
};

port@7 {
reg = <15>;
label = "lan8";
phy-handle = <&phy15>;
phy-mode = "internal";
};
SWITCH_PORT(8, 1, internal)
SWITCH_PORT(9, 2, internal)
SWITCH_PORT(10, 3, internal)
SWITCH_PORT(11, 4, internal)
SWITCH_PORT(12, 5, internal)
SWITCH_PORT(13, 6, internal)
SWITCH_PORT(14, 7, internal)
SWITCH_PORT(15, 8, internal)

port@28 {
ethernet = <&ethernet0>;
Expand Down
125 changes: 20 additions & 105 deletions target/linux/rtl838x/dts/rtl8382_d-link_dgs-1210-10p.dts
Original file line number Diff line number Diff line change
Expand Up @@ -99,58 +99,23 @@
};
};



&ethernet0 {
mdio: mdio-bus {
compatible = "realtek,rtl838x-mdio";
regmap = <&ethernet0>;
#address-cells = <1>;
#size-cells = <0>;

/* Internal phy */
phy8: ethernet-phy@8 {
reg = <8>;
compatible = "ethernet-phy-ieee802.3-c22";
};
phy9: ethernet-phy@9 {
reg = <9>;
compatible = "ethernet-phy-ieee802.3-c22";
};
phy10: ethernet-phy@10 {
reg = <10>;
compatible = "ethernet-phy-ieee802.3-c22";
};
phy11: ethernet-phy@11 {
reg = <11>;
compatible = "ethernet-phy-ieee802.3-c22";
};
phy12: ethernet-phy@12 {
reg = <12>;
compatible = "ethernet-phy-ieee802.3-c22";
};
phy13: ethernet-phy@13 {
reg = <13>;
compatible = "ethernet-phy-ieee802.3-c22";
};
phy14: ethernet-phy@14 {
reg = <14>;
compatible = "ethernet-phy-ieee802.3-c22";
};
phy15: ethernet-phy@15 {
reg = <15>;
compatible = "ethernet-phy-ieee802.3-c22";
};
phy24: ethernet-phy@24 {
compatible = "ethernet-phy-ieee802.3-c22";
phy-is-integrated;
reg = <24>;
};
phy26: ethernet-phy@26 {
compatible = "ethernet-phy-ieee802.3-c22";
phy-is-integrated;
reg = <26>;
};
INTERNAL_PHY(8)
INTERNAL_PHY(9)
INTERNAL_PHY(10)
INTERNAL_PHY(11)
INTERNAL_PHY(12)
INTERNAL_PHY(13)
INTERNAL_PHY(14)
INTERNAL_PHY(15)
INTERNAL_PHY(24)
INTERNAL_PHY(26)
};
};

Expand All @@ -159,67 +124,17 @@
#address-cells = <1>;
#size-cells = <0>;

port@0 {
reg = <8>;
label = "lan1";
phy-handle = <&phy8>;
phy-mode = "internal";
};
port@1 {
reg = <9>;
label = "lan2";
phy-handle = <&phy9>;
phy-mode = "internal";
};
port@2 {
reg = <10>;
label = "lan3";
phy-handle = <&phy10>;
phy-mode = "internal";
};
port@3 {
reg = <11>;
label = "lan4";
phy-handle = <&phy11>;
phy-mode = "internal";
};
port@4 {
reg = <12>;
label = "lan5";
phy-handle = <&phy12>;
phy-mode = "internal";
};
port@5 {
reg = <13>;
label = "lan6";
phy-handle = <&phy13>;
phy-mode = "internal";
};
port@6 {
reg = <14>;
label = "lan7";
phy-handle = <&phy14>;
phy-mode = "internal";
};
port@7 {
reg = <15>;
label = "lan8";
phy-handle = <&phy15>;
phy-mode = "internal";
};
SWITCH_PORT(8, 1, internal)
SWITCH_PORT(9, 2, internal)
SWITCH_PORT(10, 3, internal)
SWITCH_PORT(11, 4, internal)
SWITCH_PORT(12, 5, internal)
SWITCH_PORT(13, 6, internal)
SWITCH_PORT(14, 7, internal)
SWITCH_PORT(15, 8, internal)
SWITCH_PORT(24, 9, internal)
SWITCH_PORT(26, 10, internal)

port@24 {
reg = <24>;
label = "lan9";
phy-mode = "internal";
phy-handle = <&phy24>;
};
port@26 {
reg = <26>;
label = "lan10";
phy-mode = "internal";
phy-handle = <&phy26>;
};
port@28 {
ethernet = <&ethernet0>;
reg = <28>;
Expand Down
Loading

0 comments on commit e267445

Please sign in to comment.