correct sync use

rsil doesn't require a sync, isync needed for processor state register esync needed to get special register
jabbenseth · Jun 26, 2015 · 28a5a4c · 28a5a4c
1 parent 87abcf3
commit 28a5a4c
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diff --git a/cores/esp8266/Arduino.h b/cores/esp8266/Arduino.h
@@ -143,13 +143,13 @@ void ets_intr_unlock();
 // level 15 will disable ALL interrupts, 
 // level 0 will disable most software interrupts
 //
-#define xt_disable_interrupts(state, level) __asm__ __volatile__("rsil %0," __STRINGIFY(level) "; esync; isync; dsync" : "=a" (state))
-#define xt_enable_interrupts(state)  __asm__ __volatile__("wsr %0,ps; esync" :: "a" (state) : "memory")
+#define xt_disable_interrupts(state, level) __asm__ __volatile__("rsil %0," __STRINGIFY(level) : "=a" (state))
+#define xt_enable_interrupts(state)  __asm__ __volatile__("wsr %0,ps; isync" :: "a" (state) : "memory")
 
 extern uint32_t interruptsState;
 
 #define interrupts() xt_enable_interrupts(interruptsState)
-#define noInterrupts() __asm__ __volatile__("rsil %0,15; esync; isync; dsync" : "=a" (interruptsState))
+#define noInterrupts() __asm__ __volatile__("rsil %0,15" : "=a" (interruptsState))
 
 #define clockCyclesPerMicrosecond() ( F_CPU / 1000000L )
 #define clockCyclesToMicroseconds(a) ( (a) / clockCyclesPerMicrosecond() )

diff --git a/cores/esp8266/Esp.h b/cores/esp8266/Esp.h
@@ -129,7 +129,7 @@ class EspClass {
 uint32_t EspClass::getCycleCount()
 {
     uint32_t ccount;
-    __asm__ __volatile__("rsr %0,ccount":"=a" (ccount));
+    __asm__ __volatile__("esync; rsr %0,ccount":"=a" (ccount));
     return ccount;
 }