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hardirq: Make hardirq bits generic
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There is no reason for per arch hardirq bits. Make them all generic

Signed-off-by: Thomas Gleixner <[email protected]>
Acked-by: Peter Zijlstra <[email protected]>
Link: http://lkml.kernel.org/r/[email protected]
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KAGA-KOKO committed Nov 13, 2013
1 parent 09f90f6 commit 54197e4
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Showing 9 changed files with 8 additions and 71 deletions.
3 changes: 0 additions & 3 deletions arch/blackfin/include/asm/hardirq.h
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Expand Up @@ -12,9 +12,6 @@
extern void ack_bad_irq(unsigned int irq);
#define ack_bad_irq ack_bad_irq

/* Define until common code gets sane defaults */
#define HARDIRQ_BITS 9

#include <asm-generic/hardirq.h>

#endif
12 changes: 0 additions & 12 deletions arch/cris/include/asm/hardirq.h
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Expand Up @@ -2,18 +2,6 @@
#define __ASM_HARDIRQ_H

#include <asm/irq.h>

#define HARDIRQ_BITS 8

/*
* The hardirq mask has to be large enough to have
* space for potentially all IRQ sources in the system
* nesting on a single CPU:
*/
#if (1 << HARDIRQ_BITS) < NR_IRQS
# error HARDIRQ_BITS is too low!
#endif

#include <asm-generic/hardirq.h>

#endif /* __ASM_HARDIRQ_H */
16 changes: 0 additions & 16 deletions arch/m32r/include/asm/hardirq.h
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Expand Up @@ -3,22 +3,6 @@
#define __ASM_HARDIRQ_H

#include <asm/irq.h>

#if NR_IRQS > 256
#define HARDIRQ_BITS 9
#else
#define HARDIRQ_BITS 8
#endif

/*
* The hardirq mask has to be large enough to have
* space for potentially all IRQ sources in the system
* nesting on a single CPU:
*/
#if (1 << HARDIRQ_BITS) < NR_IRQS
# error HARDIRQ_BITS is too low!
#endif

#include <asm-generic/hardirq.h>

#endif /* __ASM_HARDIRQ_H */
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11 changes: 0 additions & 11 deletions arch/m68k/include/asm/hardirq.h
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Expand Up @@ -5,17 +5,6 @@
#include <linux/cache.h>
#include <asm/irq.h>

#define HARDIRQ_BITS 8

/*
* The hardirq mask has to be large enough to have
* space for potentially all IRQ sources in the system
* nesting on a single CPU:
*/
#if (1 << HARDIRQ_BITS) < NR_IRQS
# error HARDIRQ_BITS is too low!
#endif

#ifdef CONFIG_MMU

static inline void ack_bad_irq(unsigned int irq)
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2 changes: 0 additions & 2 deletions arch/s390/include/asm/hardirq.h
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Expand Up @@ -18,8 +18,6 @@
#define __ARCH_HAS_DO_SOFTIRQ
#define __ARCH_IRQ_EXIT_IRQS_DISABLED

#define HARDIRQ_BITS 8

static inline void ack_bad_irq(unsigned int irq)
{
printk(KERN_CRIT "unexpected IRQ trap at vector %02x\n", irq);
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1 change: 0 additions & 1 deletion arch/sparc/include/asm/hardirq_32.h
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Expand Up @@ -7,7 +7,6 @@
#ifndef __SPARC_HARDIRQ_H
#define __SPARC_HARDIRQ_H

#define HARDIRQ_BITS 8
#include <asm-generic/hardirq.h>

#endif /* __SPARC_HARDIRQ_H */
2 changes: 0 additions & 2 deletions arch/sparc/include/asm/hardirq_64.h
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Expand Up @@ -14,6 +14,4 @@

void ack_bad_irq(unsigned int irq);

#define HARDIRQ_BITS 8

#endif /* !(__SPARC64_HARDIRQ_H) */
2 changes: 0 additions & 2 deletions arch/tile/include/asm/hardirq.h
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Expand Up @@ -42,6 +42,4 @@ DECLARE_PER_CPU(irq_cpustat_t, irq_stat);

#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */

#define HARDIRQ_BITS 8

#endif /* _ASM_TILE_HARDIRQ_H */
30 changes: 8 additions & 22 deletions include/linux/preempt_mask.h
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Expand Up @@ -11,36 +11,22 @@
* - bits 0-7 are the preemption count (max preemption depth: 256)
* - bits 8-15 are the softirq count (max # of softirqs: 256)
*
* The hardirq count can in theory reach the same as NR_IRQS.
* In reality, the number of nested IRQS is limited to the stack
* size as well. For archs with over 1000 IRQS it is not practical
* to expect that they will all nest. We give a max of 10 bits for
* hardirq nesting. An arch may choose to give less than 10 bits.
* m68k expects it to be 8.
*
* - bits 16-25 are the hardirq count (max # of nested hardirqs: 1024)
* - bit 26 is the NMI_MASK
* - bit 27 is the PREEMPT_ACTIVE flag
* The hardirq count could in theory be the same as the number of
* interrupts in the system, but we run all interrupt handlers with
* interrupts disabled, so we cannot have nesting interrupts. Though
* there are a few palaeontologic drivers which reenable interrupts in
* the handler, so we need more than one bit here.
*
* PREEMPT_MASK: 0x000000ff
* SOFTIRQ_MASK: 0x0000ff00
* HARDIRQ_MASK: 0x03ff0000
* NMI_MASK: 0x04000000
* HARDIRQ_MASK: 0x000f0000
* NMI_MASK: 0x00100000
*/
#define PREEMPT_BITS 8
#define SOFTIRQ_BITS 8
#define HARDIRQ_BITS 4
#define NMI_BITS 1

#define MAX_HARDIRQ_BITS 10

#ifndef HARDIRQ_BITS
# define HARDIRQ_BITS MAX_HARDIRQ_BITS
#endif

#if HARDIRQ_BITS > MAX_HARDIRQ_BITS
#error HARDIRQ_BITS too high!
#endif

#define PREEMPT_SHIFT 0
#define SOFTIRQ_SHIFT (PREEMPT_SHIFT + PREEMPT_BITS)
#define HARDIRQ_SHIFT (SOFTIRQ_SHIFT + SOFTIRQ_BITS)
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