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Merge tag 'for-3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/…
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…helgaas/pci

Pull PCI changes from Bjorn Helgaas:
 "Host bridge hotplug
    - Protect acpi_pci_drivers and acpi_pci_roots (Taku Izumi)
    - Clear host bridge resource info to avoid issue when releasing
      (Yinghai Lu)
    - Notify acpi_pci_drivers when hot-plugging host bridges (Jiang Liu)
    - Use standard list ops for acpi_pci_drivers (Jiang Liu)

  Device hotplug
    - Use pci_get_domain_bus_and_slot() to close hotplug races (Jiang
      Liu)
    - Remove fakephp driver (Bjorn Helgaas)
    - Fix VGA ref count in hotplug remove path (Yinghai Lu)
    - Allow acpiphp to handle PCIe ports without native hotplug (Jiang
      Liu)
    - Implement resume regardless of pciehp_force param (Oliver Neukum)
    - Make pci_fixup_irqs() work after init (Thierry Reding)

  Miscellaneous
    - Add pci_pcie_type(dev) and remove pci_dev.pcie_type (Yijing Wang)
    - Factor out PCI Express Capability accessors (Jiang Liu)
    - Add pcibios_window_alignment() so powerpc EEH can use generic
      resource assignment (Gavin Shan)
    - Make pci_error_handlers const (Stephen Hemminger)
    - Cleanup drivers/pci/remove.c (Bjorn Helgaas)
    - Improve Vendor-Specific Extended Capability support (Bjorn
      Helgaas)
    - Use standard list ops for bus->devices (Bjorn Helgaas)
    - Avoid kmalloc in pci_get_subsys() and pci_get_class() (Feng Tang)
    - Reassign invalid bus number ranges (Intel DP43BF workaround)
      (Yinghai Lu)"

* tag 'for-3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (102 commits)
  PCI: acpiphp: Handle PCIe ports without native hotplug capability
  PCI/ACPI: Use acpi_driver_data() rather than searching acpi_pci_roots
  PCI/ACPI: Protect acpi_pci_roots list with mutex
  PCI/ACPI: Use acpi_pci_root info rather than looking it up again
  PCI/ACPI: Pass acpi_pci_root to acpi_pci_drivers' add/remove interface
  PCI/ACPI: Protect acpi_pci_drivers list with mutex
  PCI/ACPI: Notify acpi_pci_drivers when hot-plugging PCI root bridges
  PCI/ACPI: Use normal list for struct acpi_pci_driver
  PCI/ACPI: Use DEVICE_ACPI_HANDLE rather than searching acpi_pci_roots
  PCI: Fix default vga ref_count
  ia64/PCI: Clear host bridge aperture struct resource
  x86/PCI: Clear host bridge aperture struct resource
  PCI: Stop all children first, before removing all children
  Revert "PCI: Use hotplug-safe pci_get_domain_bus_and_slot()"
  PCI: Provide a default pcibios_update_irq()
  PCI: Discard __init annotations for pci_fixup_irqs() and related functions
  PCI: Use correct type when freeing bus resource list
  PCI: Check P2P bridge for invalid secondary/subordinate range
  PCI: Convert "new_id"/"remove_id" into generic pci_bus driver attributes
  xen-pcifront: Use hotplug-safe pci_get_domain_bus_and_slot()
  ...
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@torvalds
torvalds committed Oct 1, 2012
2 parents 81f56e5 + 78c8f84 commit fdb2f9c
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Showing 123 changed files with 1,078 additions and 1,750 deletions.
32 changes: 0 additions & 32 deletions Documentation/feature-removal-schedule.txt
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Expand Up @@ -253,38 +253,6 @@ Who: Dave Jones <[email protected]>, Matthew Garrett <[email protected]>

-----------------------------

What: fakephp and associated sysfs files in /sys/bus/pci/slots/
When: 2011
Why: In 2.6.27, the semantics of /sys/bus/pci/slots was redefined to
represent a machine's physical PCI slots. The change in semantics
had userspace implications, as the hotplug core no longer allowed
drivers to create multiple sysfs files per physical slot (required
for multi-function devices, e.g.). fakephp was seen as a developer's
tool only, and its interface changed. Too late, we learned that
there were some users of the fakephp interface.

In 2.6.30, the original fakephp interface was restored. At the same
time, the PCI core gained the ability that fakephp provided, namely
function-level hot-remove and hot-add.

Since the PCI core now provides the same functionality, exposed in:

/sys/bus/pci/rescan
/sys/bus/pci/devices/.../remove
/sys/bus/pci/devices/.../rescan

there is no functional reason to maintain fakephp as well.

We will keep the existing module so that 'modprobe fakephp' will
present the old /sys/bus/pci/slots/... interface for compatibility,
but users are urged to migrate their applications to the API above.

After a reasonable transition period, we will remove the legacy
fakephp interface.
Who: Alex Chiang <[email protected]>

---------------------------

What: CONFIG_RFKILL_INPUT
When: 2.6.33
Why: Should be implemented in userspace, policy daemon.
Expand Down
6 changes: 0 additions & 6 deletions arch/alpha/kernel/pci.c
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Expand Up @@ -256,12 +256,6 @@ pcibios_fixup_bus(struct pci_bus *bus)
}
}

void __init
pcibios_update_irq(struct pci_dev *dev, int irq)
{
pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
}

int
pcibios_enable_device(struct pci_dev *dev, int mask)
{
Expand Down
9 changes: 0 additions & 9 deletions arch/arm/kernel/bios32.c
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Expand Up @@ -270,15 +270,6 @@ static void __devinit pci_fixup_it8152(struct pci_dev *dev)
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ITE, PCI_DEVICE_ID_ITE_8152, pci_fixup_it8152);



void __devinit pcibios_update_irq(struct pci_dev *dev, int irq)
{
if (debug_pci)
printk("PCI: Assigning IRQ %02d to %s\n", irq, pci_name(dev));
pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
}

/*
* If the bus contains any of these devices, then we must not turn on
* parity checking of any kind. Currently this is CyberPro 20x0 only.
Expand Down
12 changes: 1 addition & 11 deletions arch/arm/mach-tegra/pcie.c
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Expand Up @@ -367,17 +367,7 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NVIDIA, 0x0bf1, tegra_pcie_fixup_class);
/* Tegra PCIE requires relaxed ordering */
static void __devinit tegra_pcie_relax_enable(struct pci_dev *dev)
{
u16 val16;
int pos = pci_find_capability(dev, PCI_CAP_ID_EXP);

if (pos <= 0) {
dev_err(&dev->dev, "skipping relaxed ordering fixup\n");
return;
}

pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &val16);
val16 |= PCI_EXP_DEVCTL_RELAX_EN;
pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, val16);
pcie_capability_set_word(dev, PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_RELAX_EN);
}
DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, tegra_pcie_relax_enable);

Expand Down
4 changes: 1 addition & 3 deletions arch/frv/mb93090-mb00/pci-vdk.c
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Expand Up @@ -330,10 +330,8 @@ void __init pcibios_fixup_bus(struct pci_bus *bus)
pci_read_bridge_bases(bus);

if (bus->number == 0) {
struct list_head *ln;
struct pci_dev *dev;
for (ln=bus->devices.next; ln != &bus->devices; ln=ln->next) {
dev = pci_dev_b(ln);
list_for_each_entry(dev, &bus->devices, bus_list) {
if (dev->devfn == 0) {
dev->resource[0].start = 0;
dev->resource[0].end = 0;
Expand Down
11 changes: 1 addition & 10 deletions arch/ia64/pci/pci.c
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Original file line number Diff line number Diff line change
Expand Up @@ -295,7 +295,6 @@ static __devinit acpi_status add_window(struct acpi_resource *res, void *data)
window->resource.flags = flags;
window->resource.start = addr.minimum + offset;
window->resource.end = window->resource.start + addr.address_length - 1;
window->resource.child = NULL;
window->offset = offset;

if (insert_resource(root, &window->resource)) {
Expand Down Expand Up @@ -357,7 +356,7 @@ pci_acpi_scan_root(struct acpi_pci_root *root)
&windows);
if (windows) {
controller->window =
kmalloc_node(sizeof(*controller->window) * windows,
kzalloc_node(sizeof(*controller->window) * windows,
GFP_KERNEL, controller->node);
if (!controller->window)
goto out2;
Expand Down Expand Up @@ -461,14 +460,6 @@ void pcibios_set_master (struct pci_dev *dev)
/* No special bus mastering setup handling */
}

void __devinit
pcibios_update_irq (struct pci_dev *dev, int irq)
{
pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);

/* ??? FIXME -- record old value for shutdown. */
}

int
pcibios_enable_device (struct pci_dev *dev, int mask)
{
Expand Down
4 changes: 1 addition & 3 deletions arch/ia64/sn/kernel/io_common.c
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Original file line number Diff line number Diff line change
Expand Up @@ -229,7 +229,6 @@ void sn_pci_fixup_slot(struct pci_dev *dev, struct pcidev_info *pcidev_info,
{
int segment = pci_domain_nr(dev->bus);
struct pcibus_bussoft *bs;
struct pci_bus *host_pci_bus;
struct pci_dev *host_pci_dev;
unsigned int bus_no, devfn;

Expand All @@ -245,8 +244,7 @@ void sn_pci_fixup_slot(struct pci_dev *dev, struct pcidev_info *pcidev_info,

bus_no = (pcidev_info->pdi_slot_host_handle >> 32) & 0xff;
devfn = pcidev_info->pdi_slot_host_handle & 0xffffffff;
host_pci_bus = pci_find_bus(segment, bus_no);
host_pci_dev = pci_get_slot(host_pci_bus, devfn);
host_pci_dev = pci_get_domain_bus_and_slot(segment, bus_no, devfn);

pcidev_info->host_pci_dev = host_pci_dev;
pcidev_info->pdi_linux_pcidev = dev;
Expand Down
5 changes: 0 additions & 5 deletions arch/m68k/kernel/pcibios.c
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Expand Up @@ -87,11 +87,6 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
return 0;
}

void pcibios_update_irq(struct pci_dev *dev, int irq)
{
pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
}

void __devinit pcibios_fixup_bus(struct pci_bus *bus)
{
struct pci_dev *dev;
Expand Down
15 changes: 5 additions & 10 deletions arch/mips/pci/pci-octeon.c
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Original file line number Diff line number Diff line change
Expand Up @@ -117,16 +117,11 @@ int pcibios_plat_dev_init(struct pci_dev *dev)
}

/* Enable the PCIe normal error reporting */
pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
if (pos) {
/* Update Device Control */
pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &config);
config |= PCI_EXP_DEVCTL_CERE; /* Correctable Error Reporting */
config |= PCI_EXP_DEVCTL_NFERE; /* Non-Fatal Error Reporting */
config |= PCI_EXP_DEVCTL_FERE; /* Fatal Error Reporting */
config |= PCI_EXP_DEVCTL_URRE; /* Unsupported Request */
pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, config);
}
config = PCI_EXP_DEVCTL_CERE; /* Correctable Error Reporting */
config |= PCI_EXP_DEVCTL_NFERE; /* Non-Fatal Error Reporting */
config |= PCI_EXP_DEVCTL_FERE; /* Fatal Error Reporting */
config |= PCI_EXP_DEVCTL_URRE; /* Unsupported Request */
pcie_capability_set_word(dev, PCI_EXP_DEVCTL, config);

/* Find the Advanced Error Reporting capability */
pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
Expand Down
6 changes: 0 additions & 6 deletions arch/mips/pci/pci.c
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Original file line number Diff line number Diff line change
Expand Up @@ -313,12 +313,6 @@ void __devinit pcibios_fixup_bus(struct pci_bus *bus)
}
}

void __init
pcibios_update_irq(struct pci_dev *dev, int irq)
{
pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
}

#ifdef CONFIG_HOTPLUG
EXPORT_SYMBOL(PCIBIOS_MIN_IO);
EXPORT_SYMBOL(PCIBIOS_MIN_MEM);
Expand Down
3 changes: 3 additions & 0 deletions arch/powerpc/include/asm/machdep.h
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Original file line number Diff line number Diff line change
Expand Up @@ -214,6 +214,9 @@ struct machdep_calls {
/* Called after scan and before resource survey */
void (*pcibios_fixup_phb)(struct pci_controller *hose);

/* Called during PCI resource reassignment */
resource_size_t (*pcibios_window_alignment)(struct pci_bus *, unsigned long type);

/* Called to shutdown machine specific hardware not already controlled
* by other drivers.
*/
Expand Down
20 changes: 20 additions & 0 deletions arch/powerpc/kernel/pci-common.c
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Original file line number Diff line number Diff line change
Expand Up @@ -99,6 +99,26 @@ void pcibios_free_controller(struct pci_controller *phb)
kfree(phb);
}

/*
* The function is used to return the minimal alignment
* for memory or I/O windows of the associated P2P bridge.
* By default, 4KiB alignment for I/O windows and 1MiB for
* memory windows.
*/
resource_size_t pcibios_window_alignment(struct pci_bus *bus,
unsigned long type)
{
if (ppc_md.pcibios_window_alignment)
return ppc_md.pcibios_window_alignment(bus, type);

/*
* PCI core will figure out the default
* alignment: 4KiB for I/O and 1MiB for
* memory window.
*/
return 1;
}

static resource_size_t pcibios_io_size(const struct pci_controller *hose)
{
#ifdef CONFIG_PPC64
Expand Down
41 changes: 40 additions & 1 deletion arch/powerpc/platforms/powernv/pci-ioda.c
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Original file line number Diff line number Diff line change
Expand Up @@ -855,7 +855,7 @@ static void __devinit pnv_ioda_setup_PEs(struct pci_bus *bus)
if (pe == NULL)
continue;
/* Leaving the PCIe domain ... single PE# */
if (dev->pcie_type == PCI_EXP_TYPE_PCI_BRIDGE)
if (pci_pcie_type(dev) == PCI_EXP_TYPE_PCI_BRIDGE)
pnv_ioda_setup_bus_PE(dev, pe);
else if (dev->subordinate)
pnv_ioda_setup_PEs(dev->subordinate);
Expand Down Expand Up @@ -1139,6 +1139,44 @@ static void __devinit pnv_pci_ioda_fixup_phb(struct pci_controller *hose)
}
}

/*
* Returns the alignment for I/O or memory windows for P2P
* bridges. That actually depends on how PEs are segmented.
* For now, we return I/O or M32 segment size for PE sensitive
* P2P bridges. Otherwise, the default values (4KiB for I/O,
* 1MiB for memory) will be returned.
*
* The current PCI bus might be put into one PE, which was
* create against the parent PCI bridge. For that case, we
* needn't enlarge the alignment so that we can save some
* resources.
*/
static resource_size_t pnv_pci_window_alignment(struct pci_bus *bus,
unsigned long type)
{
struct pci_dev *bridge;
struct pci_controller *hose = pci_bus_to_host(bus);
struct pnv_phb *phb = hose->private_data;
int num_pci_bridges = 0;

bridge = bus->self;
while (bridge) {
if (pci_pcie_type(bridge) == PCI_EXP_TYPE_PCI_BRIDGE) {
num_pci_bridges++;
if (num_pci_bridges >= 2)
return 1;
}

bridge = bridge->bus->self;
}

/* We need support prefetchable memory window later */
if (type & IORESOURCE_MEM)
return phb->ioda.m32_segsize;

return phb->ioda.io_segsize;
}

/* Prevent enabling devices for which we couldn't properly
* assign a PE
*/
Expand Down Expand Up @@ -1306,6 +1344,7 @@ void __init pnv_pci_init_ioda1_phb(struct device_node *np)
*/
ppc_md.pcibios_fixup_phb = pnv_pci_ioda_fixup_phb;
ppc_md.pcibios_enable_device_hook = pnv_pci_enable_device_hook;
ppc_md.pcibios_window_alignment = pnv_pci_window_alignment;
pci_add_flags(PCI_PROBE_ONLY | PCI_REASSIGN_ALL_RSRC);

/* Reset IODA tables to a clean state */
Expand Down
5 changes: 0 additions & 5 deletions arch/sh/drivers/pci/pci.c
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Original file line number Diff line number Diff line change
Expand Up @@ -192,11 +192,6 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
return pci_enable_resources(dev, mask);
}

void __init pcibios_update_irq(struct pci_dev *dev, int irq)
{
pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
}

static void __init
pcibios_bus_report_status_early(struct pci_channel *hose,
int top_bus, int current_bus,
Expand Down
9 changes: 0 additions & 9 deletions arch/sparc/kernel/leon_pci.c
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Original file line number Diff line number Diff line change
Expand Up @@ -102,15 +102,6 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
return pci_enable_resources(dev, mask);
}

void __devinit pcibios_update_irq(struct pci_dev *dev, int irq)
{
#ifdef CONFIG_PCI_DEBUG
printk(KERN_DEBUG "LEONPCI: Assigning IRQ %02d to %s\n", irq,
pci_name(dev));
#endif
pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
}

/* in/out routines taken from pcic.c
*
* This probably belongs here rather than ioport.c because
Expand Down
4 changes: 0 additions & 4 deletions arch/sparc/kernel/pci.c
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Original file line number Diff line number Diff line change
Expand Up @@ -622,10 +622,6 @@ void __devinit pcibios_fixup_bus(struct pci_bus *pbus)
{
}

void pcibios_update_irq(struct pci_dev *pdev, int irq)
{
}

resource_size_t pcibios_align_resource(void *data, const struct resource *res,
resource_size_t size, resource_size_t align)
{
Expand Down
34 changes: 6 additions & 28 deletions arch/tile/kernel/pci.c
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Original file line number Diff line number Diff line change
Expand Up @@ -246,38 +246,24 @@ static void __devinit fixup_read_and_payload_sizes(void)

/* Scan for the smallest maximum payload size. */
while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
int pcie_caps_offset;
u32 devcap;
int max_payload;

pcie_caps_offset = pci_find_capability(dev, PCI_CAP_ID_EXP);
if (pcie_caps_offset == 0)
if (!pci_is_pcie(dev))
continue;

pci_read_config_dword(dev, pcie_caps_offset + PCI_EXP_DEVCAP,
&devcap);
pcie_capability_read_dword(dev, PCI_EXP_DEVCAP, &devcap);
max_payload = devcap & PCI_EXP_DEVCAP_PAYLOAD;
if (max_payload < smallest_max_payload)
smallest_max_payload = max_payload;
}

/* Now, set the max_payload_size for all devices to that value. */
new_values = (max_read_size << 12) | (smallest_max_payload << 5);
while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
int pcie_caps_offset;
u16 devctl;

pcie_caps_offset = pci_find_capability(dev, PCI_CAP_ID_EXP);
if (pcie_caps_offset == 0)
continue;

pci_read_config_word(dev, pcie_caps_offset + PCI_EXP_DEVCTL,
&devctl);
devctl &= ~(PCI_EXP_DEVCTL_PAYLOAD | PCI_EXP_DEVCTL_READRQ);
devctl |= new_values;
pci_write_config_word(dev, pcie_caps_offset + PCI_EXP_DEVCTL,
devctl);
}
while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL)
pcie_capability_clear_and_set_word(dev, PCI_EXP_DEVCTL,
PCI_EXP_DEVCTL_PAYLOAD | PCI_EXP_DEVCTL_READRQ,
new_values);
}


Expand Down Expand Up @@ -403,14 +389,6 @@ void pcibios_set_master(struct pci_dev *dev)
/* No special bus mastering setup handling. */
}

/*
* This is called from the generic Linux layer.
*/
void __devinit pcibios_update_irq(struct pci_dev *dev, int irq)
{
pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
}

/*
* Enable memory and/or address decoding, as appropriate, for the
* device described by the 'dev' struct.
Expand Down
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