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ppc: Move cpu/$CPU to arch/ppc/cpu/$CPU
Signed-off-by: Peter Tyser <[email protected]>
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2 changes: 1 addition & 1 deletion
2
cpu/ppc4xx/40x_spd_sdram.c → arch/ppc/cpu/ppc4xx/40x_spd_sdram.c
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2 changes: 1 addition & 1 deletion
2
cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c → arch/ppc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c
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2
cpu/ppc4xx/denali_data_eye.c → arch/ppc/cpu/ppc4xx/denali_data_eye.c
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -1,5 +1,5 @@ | ||
/* | ||
* cpu/ppc4xx/denali_data_eye.c | ||
* arch/ppc/cpu/ppc4xx/denali_data_eye.c | ||
* Extracted from board/amcc/sequoia/sdram.c by Larry Johnson <[email protected]>. | ||
* | ||
* (C) Copyright 2006 | ||
|
4 changes: 2 additions & 2 deletions
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cpu/ppc4xx/denali_spd_ddr2.c → arch/ppc/cpu/ppc4xx/denali_spd_ddr2.c
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -1,12 +1,12 @@ | ||
/* | ||
* cpu/ppc4xx/denali_spd_ddr2.c | ||
* arch/ppc/cpu/ppc4xx/denali_spd_ddr2.c | ||
* This SPD SDRAM detection code supports AMCC PPC44x CPUs with a Denali-core | ||
* DDR2 controller, specifically the 440EPx/GRx. | ||
* | ||
* (C) Copyright 2007-2008 | ||
* Larry Johnson, [email protected]. | ||
* | ||
* Based primarily on cpu/ppc4xx/4xx_spd_ddr2.c, which is... | ||
* Based primarily on arch/ppc/cpu/ppc4xx/4xx_spd_ddr2.c, which is... | ||
* | ||
* (C) Copyright 2007 | ||
* Stefan Roese, DENX Software Engineering, [email protected]. | ||
|
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