MIPS: BMIPS: Enable HARDIRQS_SW_RESEND

HW interrupts triggered when irq_disable() were being ignored. Enable resending HW interrupts as SW interrupts. This was causing an issue where the interrupts waking the system up from a suspend state were not calling their interrupt handlers. Signed-off-by: Justin Chen <[email protected]> Acked-by: Florian Fainelli <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/16116/ Signed-off-by: James Hogan <[email protected]>
jangid · Nov 13, 2017 · 4dc4704 · 4dc4704
1 parent b54fcf6
commit 4dc4704
Showing 1 changed file with 1 addition and 0 deletions.
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
@@ -232,6 +232,7 @@ config BMIPS_GENERIC
 	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
 	select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
 	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
+	select HARDIRQS_SW_RESEND
 	help
 	  Build a generic DT-based kernel image that boots on select
 	  BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top