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Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/ker…
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…nel/git/arm/arm-soc

Pull "ARM: a few more SoC fixes for 3.4-rc" from Olof Johansson:
 - A handful of warning and build fixes for Qualcomm MSM
 - Build/warning and bug fixes for Samsung Exynos
 - A fix from Rob Herring that removes misplaced interrupt-parent
   properties from a few device trees
 - A fix to OMAP dealing with cpufreq build errors, removing some of the
   offending code since it was redundant anyway

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: OMAP: clock: cleanup CPUfreq leftovers, fix build errors
  ARM: dts: remove blank interrupt-parent properties
  ARM: EXYNOS: Fix Kconfig dependencies for device tree enabled machine files
  ARM: EXYNOS: Remove broken config values for touchscren for NURI board
  ARM: EXYNOS: set fix xusbxti clock for NURI and Universal210 boards
  ARM: EXYNOS: fix regulator name for NURI board
  ARM: SAMSUNG: make SAMSUNG_PM_DEBUG select DEBUG_LL
  ARM: msm: Fix section mismatches in proc_comm.c
  video: msm: Fix section mismatches in mddi.c
  arm: msm: trout: fix compile failure
  arm: msm: halibut: remove unneeded fixup
  ARM: EXYNOS: Add PDMA and MDMA physical base address defines
  ARM: S5PV210: Fix compiler warning in dma.c file
  ARM: EXYNOS: Fix compile error in exynos5250-cpufreq.c
  ARM: EXYNOS: Add missing definition for IRQ_I2S0
  ARM: S5PV210: fix unused LDO supply field from wm8994_pdata
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@torvalds
torvalds committed Apr 15, 2012
2 parents 218a8c2 + 961a238 commit 6c23b8e
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Showing 26 changed files with 31 additions and 193 deletions.
1 change: 0 additions & 1 deletion arch/arm/boot/dts/at91sam9g20.dtsi
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Expand Up @@ -55,7 +55,6 @@
#interrupt-cells = <2>;
compatible = "atmel,at91rm9200-aic";
interrupt-controller;
interrupt-parent;
reg = <0xfffff000 0x200>;
};

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1 change: 0 additions & 1 deletion arch/arm/boot/dts/at91sam9g45.dtsi
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Expand Up @@ -56,7 +56,6 @@
#interrupt-cells = <2>;
compatible = "atmel,at91rm9200-aic";
interrupt-controller;
interrupt-parent;
reg = <0xfffff000 0x200>;
};

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1 change: 0 additions & 1 deletion arch/arm/boot/dts/at91sam9x5.dtsi
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Expand Up @@ -54,7 +54,6 @@
#interrupt-cells = <2>;
compatible = "atmel,at91rm9200-aic";
interrupt-controller;
interrupt-parent;
reg = <0xfffff000 0x200>;
};

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1 change: 0 additions & 1 deletion arch/arm/boot/dts/db8500.dtsi
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Expand Up @@ -24,7 +24,6 @@
#interrupt-cells = <3>;
#address-cells = <1>;
interrupt-controller;
interrupt-parent;
reg = <0xa0411000 0x1000>,
<0xa0410100 0x100>;
};
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1 change: 0 additions & 1 deletion arch/arm/boot/dts/highbank.dts
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Expand Up @@ -89,7 +89,6 @@
#size-cells = <0>;
#address-cells = <1>;
interrupt-controller;
interrupt-parent;
reg = <0xfff11000 0x1000>,
<0xfff10100 0x100>;
};
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2 changes: 2 additions & 0 deletions arch/arm/mach-exynos/Kconfig
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Expand Up @@ -368,6 +368,7 @@ comment "Flattened Device Tree based board for EXYNOS SoCs"

config MACH_EXYNOS4_DT
bool "Samsung Exynos4 Machine using device tree"
depends on ARCH_EXYNOS4
select CPU_EXYNOS4210
select USE_OF
select ARM_AMBA
Expand All @@ -380,6 +381,7 @@ config MACH_EXYNOS4_DT

config MACH_EXYNOS5_DT
bool "SAMSUNG EXYNOS5 Machine using device tree"
depends on ARCH_EXYNOS5
select SOC_EXYNOS5250
select USE_OF
select ARM_AMBA
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2 changes: 2 additions & 0 deletions arch/arm/mach-exynos/include/mach/irqs.h
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Expand Up @@ -212,6 +212,8 @@
#define IRQ_MFC EXYNOS4_IRQ_MFC
#define IRQ_SDO EXYNOS4_IRQ_SDO

#define IRQ_I2S0 EXYNOS4_IRQ_I2S0

#define IRQ_ADC EXYNOS4_IRQ_ADC0
#define IRQ_TC EXYNOS4_IRQ_PEN0

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4 changes: 4 additions & 0 deletions arch/arm/mach-exynos/include/mach/map.h
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Expand Up @@ -89,6 +89,10 @@
#define EXYNOS4_PA_MDMA1 0x12840000
#define EXYNOS4_PA_PDMA0 0x12680000
#define EXYNOS4_PA_PDMA1 0x12690000
#define EXYNOS5_PA_MDMA0 0x10800000
#define EXYNOS5_PA_MDMA1 0x11C10000
#define EXYNOS5_PA_PDMA0 0x121A0000
#define EXYNOS5_PA_PDMA1 0x121B0000

#define EXYNOS4_PA_SYSMMU_MDMA 0x10A40000
#define EXYNOS4_PA_SYSMMU_SSS 0x10A50000
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6 changes: 6 additions & 0 deletions arch/arm/mach-exynos/include/mach/regs-clock.h
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Expand Up @@ -255,9 +255,15 @@

/* For EXYNOS5250 */

#define EXYNOS5_APLL_LOCK EXYNOS_CLKREG(0x00000)
#define EXYNOS5_APLL_CON0 EXYNOS_CLKREG(0x00100)
#define EXYNOS5_CLKSRC_CPU EXYNOS_CLKREG(0x00200)
#define EXYNOS5_CLKMUX_STATCPU EXYNOS_CLKREG(0x00400)
#define EXYNOS5_CLKDIV_CPU0 EXYNOS_CLKREG(0x00500)
#define EXYNOS5_CLKDIV_CPU1 EXYNOS_CLKREG(0x00504)
#define EXYNOS5_CLKDIV_STATCPU0 EXYNOS_CLKREG(0x00600)
#define EXYNOS5_CLKDIV_STATCPU1 EXYNOS_CLKREG(0x00604)

#define EXYNOS5_MPLL_CON0 EXYNOS_CLKREG(0x04100)
#define EXYNOS5_CLKSRC_CORE1 EXYNOS_CLKREG(0x04204)

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2 changes: 1 addition & 1 deletion arch/arm/mach-exynos/mach-exynos5-dt.c
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Expand Up @@ -45,7 +45,7 @@ static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = {
"exynos4210-uart.3", NULL),
OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA0, "dma-pl330.0", NULL),
OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA1, "dma-pl330.1", NULL),
OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA1, "dma-pl330.2", NULL),
OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_MDMA1, "dma-pl330.2", NULL),
{},
};

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46 changes: 2 additions & 44 deletions arch/arm/mach-exynos/mach-nuri.c
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Expand Up @@ -307,49 +307,7 @@ static struct i2c_board_info i2c1_devs[] __initdata = {
};

/* TSP */
static u8 mxt_init_vals[] = {
/* MXT_GEN_COMMAND(6) */
0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* MXT_GEN_POWER(7) */
0x20, 0xff, 0x32,
/* MXT_GEN_ACQUIRE(8) */
0x0a, 0x00, 0x05, 0x00, 0x00, 0x00, 0x09, 0x23,
/* MXT_TOUCH_MULTI(9) */
0x00, 0x00, 0x00, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x02, 0x00,
0x00, 0x01, 0x01, 0x0e, 0x0a, 0x0a, 0x0a, 0x0a, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00,
/* MXT_TOUCH_KEYARRAY(15) */
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00,
0x00,
/* MXT_SPT_GPIOPWM(19) */
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* MXT_PROCI_GRIPFACE(20) */
0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x28, 0x04,
0x0f, 0x0a,
/* MXT_PROCG_NOISE(22) */
0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x23, 0x00,
0x00, 0x05, 0x0f, 0x19, 0x23, 0x2d, 0x03,
/* MXT_TOUCH_PROXIMITY(23) */
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00,
/* MXT_PROCI_ONETOUCH(24) */
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* MXT_SPT_SELFTEST(25) */
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00,
/* MXT_PROCI_TWOTOUCH(27) */
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* MXT_SPT_CTECONFIG(28) */
0x00, 0x00, 0x02, 0x08, 0x10, 0x00,
};

static struct mxt_platform_data mxt_platform_data = {
.config = mxt_init_vals,
.config_length = ARRAY_SIZE(mxt_init_vals),

.x_line = 18,
.y_line = 11,
.x_size = 1024,
Expand Down Expand Up @@ -571,7 +529,7 @@ static struct regulator_init_data __initdata max8997_ldo7_data = {

static struct regulator_init_data __initdata max8997_ldo8_data = {
.constraints = {
.name = "VUSB/VDAC_3.3V_C210",
.name = "VUSB+VDAC_3.3V_C210",
.min_uV = 3300000,
.max_uV = 3300000,
.valid_ops_mask = REGULATOR_CHANGE_STATUS,
Expand Down Expand Up @@ -1347,6 +1305,7 @@ static struct platform_device *nuri_devices[] __initdata = {

static void __init nuri_map_io(void)
{
clk_xusbxti.rate = 24000000;
exynos_init_io(NULL, 0);
s3c24xx_init_clocks(24000000);
s3c24xx_init_uarts(nuri_uartcfgs, ARRAY_SIZE(nuri_uartcfgs));
Expand Down Expand Up @@ -1379,7 +1338,6 @@ static void __init nuri_machine_init(void)
nuri_camera_init();

nuri_ehci_init();
clk_xusbxti.rate = 24000000;

/* Last */
platform_add_devices(nuri_devices, ARRAY_SIZE(nuri_devices));
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2 changes: 2 additions & 0 deletions arch/arm/mach-exynos/mach-universal_c210.c
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Expand Up @@ -29,6 +29,7 @@
#include <asm/mach-types.h>

#include <plat/regs-serial.h>
#include <plat/clock.h>
#include <plat/cpu.h>
#include <plat/devs.h>
#include <plat/iic.h>
Expand Down Expand Up @@ -1057,6 +1058,7 @@ static struct platform_device *universal_devices[] __initdata = {

static void __init universal_map_io(void)
{
clk_xusbxti.rate = 24000000;
exynos_init_io(NULL, 0);
s3c24xx_init_clocks(24000000);
s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs));
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3 changes: 0 additions & 3 deletions arch/arm/mach-msm/board-halibut.c
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Expand Up @@ -86,9 +86,6 @@ static void __init halibut_init(void)
static void __init halibut_fixup(struct tag *tags, char **cmdline,
struct meminfo *mi)
{
mi->nr_banks=1;
mi->bank[0].start = PHYS_OFFSET;
mi->bank[0].size = (101*1024*1024);
}

static void __init halibut_map_io(void)
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1 change: 1 addition & 0 deletions arch/arm/mach-msm/board-trout-panel.c
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Expand Up @@ -12,6 +12,7 @@

#include <asm/io.h>
#include <asm/mach-types.h>
#include <asm/system_info.h>

#include <mach/msm_fb.h>
#include <mach/vreg.h>
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1 change: 1 addition & 0 deletions arch/arm/mach-msm/board-trout.c
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Expand Up @@ -19,6 +19,7 @@
#include <linux/platform_device.h>
#include <linux/clkdev.h>

#include <asm/system_info.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
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2 changes: 1 addition & 1 deletion arch/arm/mach-msm/proc_comm.c
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Expand Up @@ -121,7 +121,7 @@ int msm_proc_comm(unsigned cmd, unsigned *data1, unsigned *data2)
* and unknown state. This function should be called early to
* wait on the ARM9.
*/
void __init proc_comm_boot_wait(void)
void __devinit proc_comm_boot_wait(void)
{
void __iomem *base = MSM_SHARED_RAM_BASE;

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80 changes: 0 additions & 80 deletions arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
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Expand Up @@ -165,83 +165,3 @@ int omap2_select_table_rate(struct clk *clk, unsigned long rate)

return 0;
}

#ifdef CONFIG_CPU_FREQ
/*
* Walk PRCM rate table and fillout cpufreq freq_table
* XXX This should be replaced by an OPP layer in the near future
*/
static struct cpufreq_frequency_table *freq_table;

void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table **table)
{
const struct prcm_config *prcm;
int i = 0;
int tbl_sz = 0;

if (!cpu_is_omap24xx())
return;

for (prcm = rate_table; prcm->mpu_speed; prcm++) {
if (!(prcm->flags & cpu_mask))
continue;
if (prcm->xtal_speed != sclk->rate)
continue;

/* don't put bypass rates in table */
if (prcm->dpll_speed == prcm->xtal_speed)
continue;

tbl_sz++;
}

/*
* XXX Ensure that we're doing what CPUFreq expects for this error
* case and the following one
*/
if (tbl_sz == 0) {
pr_warning("%s: no matching entries in rate_table\n",
__func__);
return;
}

/* Include the CPUFREQ_TABLE_END terminator entry */
tbl_sz++;

freq_table = kzalloc(sizeof(struct cpufreq_frequency_table) * tbl_sz,
GFP_ATOMIC);
if (!freq_table) {
pr_err("%s: could not kzalloc frequency table\n", __func__);
return;
}

for (prcm = rate_table; prcm->mpu_speed; prcm++) {
if (!(prcm->flags & cpu_mask))
continue;
if (prcm->xtal_speed != sclk->rate)
continue;

/* don't put bypass rates in table */
if (prcm->dpll_speed == prcm->xtal_speed)
continue;

freq_table[i].index = i;
freq_table[i].frequency = prcm->mpu_speed / 1000;
i++;
}

freq_table[i].index = i;
freq_table[i].frequency = CPUFREQ_TABLE_END;

*table = &freq_table[0];
}

void omap2_clk_exit_cpufreq_table(struct cpufreq_frequency_table **table)
{
if (!cpu_is_omap24xx())
return;

kfree(freq_table);
}

#endif
5 changes: 0 additions & 5 deletions arch/arm/mach-omap2/clock.c
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Expand Up @@ -536,10 +536,5 @@ struct clk_functions omap2_clk_functions = {
.clk_set_rate = omap2_clk_set_rate,
.clk_set_parent = omap2_clk_set_parent,
.clk_disable_unused = omap2_clk_disable_unused,
#ifdef CONFIG_CPU_FREQ
/* These will be removed when the OPP code is integrated */
.clk_init_cpufreq_table = omap2_clk_init_cpufreq_table,
.clk_exit_cpufreq_table = omap2_clk_exit_cpufreq_table,
#endif
};

8 changes: 0 additions & 8 deletions arch/arm/mach-omap2/clock.h
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Expand Up @@ -146,14 +146,6 @@ extern const struct clksel_rate gpt_sys_rates[];
extern const struct clksel_rate gfx_l3_rates[];
extern const struct clksel_rate dsp_ick_rates[];

#if defined(CONFIG_ARCH_OMAP2) && defined(CONFIG_CPU_FREQ)
extern void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table **table);
extern void omap2_clk_exit_cpufreq_table(struct cpufreq_frequency_table **table);
#else
#define omap2_clk_init_cpufreq_table 0
#define omap2_clk_exit_cpufreq_table 0
#endif

extern const struct clkops clkops_omap2_iclk_dflt_wait;
extern const struct clkops clkops_omap2_iclk_dflt;
extern const struct clkops clkops_omap2_iclk_idle_only;
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2 changes: 0 additions & 2 deletions arch/arm/mach-s5pv210/dma.c
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Expand Up @@ -33,8 +33,6 @@
#include <mach/irqs.h>
#include <mach/dma.h>

static u64 dma_dmamask = DMA_BIT_MASK(32);

static u8 pdma0_peri[] = {
DMACH_UART0_RX,
DMACH_UART0_TX,
Expand Down
4 changes: 2 additions & 2 deletions arch/arm/mach-s5pv210/mach-aquila.c
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Expand Up @@ -484,8 +484,8 @@ static struct wm8994_pdata wm8994_platform_data = {
.gpio_defaults[8] = 0x0100,
.gpio_defaults[9] = 0x0100,
.gpio_defaults[10] = 0x0100,
.ldo[0] = { S5PV210_MP03(6), NULL, &wm8994_ldo1_data }, /* XM0FRNB_2 */
.ldo[1] = { 0, NULL, &wm8994_ldo2_data },
.ldo[0] = { S5PV210_MP03(6), &wm8994_ldo1_data }, /* XM0FRNB_2 */
.ldo[1] = { 0, &wm8994_ldo2_data },
};

/* GPIO I2C PMIC */
Expand Down
4 changes: 2 additions & 2 deletions arch/arm/mach-s5pv210/mach-goni.c
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Original file line number Diff line number Diff line change
Expand Up @@ -674,8 +674,8 @@ static struct wm8994_pdata wm8994_platform_data = {
.gpio_defaults[8] = 0x0100,
.gpio_defaults[9] = 0x0100,
.gpio_defaults[10] = 0x0100,
.ldo[0] = { S5PV210_MP03(6), NULL, &wm8994_ldo1_data }, /* XM0FRNB_2 */
.ldo[1] = { 0, NULL, &wm8994_ldo2_data },
.ldo[0] = { S5PV210_MP03(6), &wm8994_ldo1_data }, /* XM0FRNB_2 */
.ldo[1] = { 0, &wm8994_ldo2_data },
};

/* GPIO I2C PMIC */
Expand Down
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