Enable AArch64 as a target built by default.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174322 91177308-0d34-0410-b5e6-96231b3b80d8
jcnm · Feb 4, 2013 · 4c40840 · 4c40840
1 parent 4f12e53
commit 4c40840
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Showing 3 changed files with 3 additions and 2 deletions.
diff --git a/CMakeLists.txt b/CMakeLists.txt
@@ -74,6 +74,7 @@ set(LLVM_EXAMPLES_BINARY_DIR ${LLVM_BINARY_DIR}/examples)
 set(LLVM_LIBDIR_SUFFIX "" CACHE STRING "Define suffix of library directory name (32/64)" )
 
 set(LLVM_ALL_TARGETS
+  AArch64
   ARM
   CppBackend
   Hexagon

diff --git a/autoconf/configure.ac b/autoconf/configure.ac
@@ -786,7 +786,7 @@ if test "$enableval" = host-only ; then
   enableval=host
 fi
 case "$enableval" in
-  all) TARGETS_TO_BUILD="X86 Sparc PowerPC ARM Mips XCore MSP430 CppBackend MBlaze NVPTX Hexagon" ;;
+  all) TARGETS_TO_BUILD="X86 Sparc PowerPC AArch64 ARM Mips XCore MSP430 CppBackend MBlaze NVPTX Hexagon" ;;
   *)for a_target in `echo $enableval|sed -e 's/,/ /g' ` ; do
       case "$a_target" in
         x86)      TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;

diff --git a/configure b/configure
@@ -5602,7 +5602,7 @@ if test "$enableval" = host-only ; then
   enableval=host
 fi
 case "$enableval" in
-  all) TARGETS_TO_BUILD="X86 Sparc PowerPC ARM Mips XCore MSP430 CppBackend MBlaze NVPTX Hexagon" ;;
+  all) TARGETS_TO_BUILD="X86 Sparc PowerPC AArch64 ARM Mips XCore MSP430 CppBackend MBlaze NVPTX Hexagon" ;;
   *)for a_target in `echo $enableval|sed -e 's/,/ /g' ` ; do
       case "$a_target" in
         x86)      TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
-Original file line number
+Diff line change
@@ Expand Up / @@ -74,6 +74,7 @@ set(LLVM_EXAMPLES_BINARY_DIR ${LLVM_BINARY_DIR}/examples) @@
     set(LLVM_LIBDIR_SUFFIX "" CACHE STRING "Define suffix of library directory name (32/64)" )
     set(LLVM_ALL_TARGETS
+      AArch64
       ARM
       CppBackend
       Hexagon
@@ Expand Down @@