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Add support for the PowerPC 64-bit SVR4 ABI.
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The Link Register is volatile when using the 32-bit SVR4 ABI.
Make it possible to use the 64-bit SVR4 ABI.
Add non-volatile registers for the 64-bit SVR4 ABI.
Make sure r2 is a reserved register when using the 64-bit SVR4 ABI.
Update PPCFrameInfo for the 64-bit SVR4 ABI.
Add FIXME for 64-bit Darwin PPC.
Insert NOP instruction after direct function calls.
Emit official procedure descriptors.
Create TOC entries for GlobalAddress references.
Spill 64-bit non-volatile registers to the correct slots.
Only custom lower VAARG when using the 32-bit SVR4 ABI.
Use simple VASTART lowering for the 64-bit SVR4 ABI.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79091 91177308-0d34-0410-b5e6-96231b3b80d8
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Tilmann Scheller committed Aug 15, 2009
1 parent 7a1e872 commit 6b16eff
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Showing 9 changed files with 361 additions and 72 deletions.
60 changes: 57 additions & 3 deletions lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp
View file
Original file line number Diff line number Diff line change
Expand Up @@ -81,13 +81,14 @@ namespace {
};

StringMap<FnStubInfo> FnStubs;
StringMap<std::string> GVStubs, HiddenGVStubs;
StringMap<std::string> GVStubs, HiddenGVStubs, TOC;
const PPCSubtarget &Subtarget;
uint64_t LabelID;
public:
explicit PPCAsmPrinter(formatted_raw_ostream &O, TargetMachine &TM,
const TargetAsmInfo *T, bool V)
: AsmPrinter(O, TM, T, V),
Subtarget(TM.getSubtarget<PPCSubtarget>()) {}
Subtarget(TM.getSubtarget<PPCSubtarget>()), LabelID(0) {}

virtual const char *getPassName() const {
return "PowerPC Assembly Printer";
Expand Down Expand Up @@ -310,6 +311,28 @@ namespace {
printOperand(MI, OpNo+1);
}

void printTOCEntryLabel(const MachineInstr *MI, unsigned OpNo) {
const MachineOperand &MO = MI->getOperand(OpNo);

assert(MO.getType() == MachineOperand::MO_GlobalAddress);

GlobalValue *GV = MO.getGlobal();

std::string Name = Mang->getMangledName(GV);

// Map symbol -> label of TOC entry.
if (TOC.count(Name) == 0) {
std::string Label;
Label += TAI->getPrivateGlobalPrefix();
Label += "C";
Label += utostr(LabelID++);

TOC[Name] = Label;
}

O << TOC[Name] << "@toc";
}

void printPredicateOperand(const MachineInstr *MI, unsigned OpNo,
const char *Modifier);

Expand All @@ -330,6 +353,7 @@ namespace {
}

bool runOnMachineFunction(MachineFunction &F);
bool doFinalization(Module &M);

void getAnalysisUsage(AnalysisUsage &AU) const {
AU.setPreservesAll();
Expand Down Expand Up @@ -612,7 +636,19 @@ bool PPCLinuxAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
printVisibility(CurrentFnName, F->getVisibility());

EmitAlignment(MF.getAlignment(), F);
O << CurrentFnName << ":\n";

if (Subtarget.isPPC64()) {
// Emit an official procedure descriptor.
// FIXME 64-bit SVR4: Use MCSection here?
O << "\t.section\t\".opd\",\"aw\"\n";
O << "\t.align 3\n";
O << CurrentFnName << ":\n";
O << "\t.quad .L." << CurrentFnName << ",.TOC.@tocbase\n";
O << "\t.previous\n";
O << ".L." << CurrentFnName << ":\n";
} else {
O << CurrentFnName << ":\n";
}

// Emit pre-function debug information.
DW->BeginFunction(&MF);
Expand Down Expand Up @@ -731,6 +767,24 @@ void PPCLinuxAsmPrinter::PrintGlobalVariable(const GlobalVariable *GVar) {
O << '\n';
}

bool PPCLinuxAsmPrinter::doFinalization(Module &M) {
const TargetData *TD = TM.getTargetData();

bool isPPC64 = TD->getPointerSizeInBits() == 64;

if (isPPC64 && !TOC.empty()) {
// FIXME 64-bit SVR4: Use MCSection here?
O << "\t.section\t\".toc\",\"aw\"\n";

for (StringMap<std::string>::iterator I = TOC.begin(), E = TOC.end();
I != E; ++I) {
O << I->second << ":\n";
O << "\t.tc " << I->getKeyData() << "[TC]," << I->getKeyData() << '\n';
}
}

return AsmPrinter::doFinalization(M);
}

/// runOnMachineFunction - This uses the printMachineInstruction()
/// method to print assembly for each instruction.
Expand Down
143 changes: 123 additions & 20 deletions lib/Target/PowerPC/PPCFrameInfo.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -31,61 +31,60 @@ class PPCFrameInfo: public TargetFrameInfo {

/// getReturnSaveOffset - Return the previous frame offset to save the
/// return address.
static unsigned getReturnSaveOffset(bool LP64, bool isDarwinABI) {
static unsigned getReturnSaveOffset(bool isPPC64, bool isDarwinABI) {
if (isDarwinABI)
return LP64 ? 16 : 8;
return isPPC64 ? 16 : 8;
// SVR4 ABI:
return 4;
return isPPC64 ? 16 : 4;
}

/// getFramePointerSaveOffset - Return the previous frame offset to save the
/// frame pointer.
static unsigned getFramePointerSaveOffset(bool LP64, bool isDarwinABI) {
static unsigned getFramePointerSaveOffset(bool isPPC64, bool isDarwinABI) {
// For the Darwin ABI:
// Use the TOC save slot in the PowerPC linkage area for saving the frame
// pointer (if needed.) LLVM does not generate code that uses the TOC (R2
// is treated as a caller saved register.)
if (isDarwinABI)
return LP64 ? 40 : 20;
return isPPC64 ? 40 : 20;

// SVR4 ABI:
// Save it right before the link register
// SVR4 ABI: First slot in the general register save area.
return -4U;
}

/// getLinkageSize - Return the size of the PowerPC ABI linkage area.
///
static unsigned getLinkageSize(bool LP64, bool isDarwinABI) {
if (isDarwinABI)
return 6 * (LP64 ? 8 : 4);
static unsigned getLinkageSize(bool isPPC64, bool isDarwinABI) {
if (isDarwinABI || isPPC64)
return 6 * (isPPC64 ? 8 : 4);

// SVR4 ABI:
return 8;
}

/// getMinCallArgumentsSize - Return the size of the minium PowerPC ABI
/// argument area.
static unsigned getMinCallArgumentsSize(bool LP64, bool isDarwinABI) {
// For the Darwin ABI:
static unsigned getMinCallArgumentsSize(bool isPPC64, bool isDarwinABI) {
// For the Darwin ABI / 64-bit SVR4 ABI:
// The prolog code of the callee may store up to 8 GPR argument registers to
// the stack, allowing va_start to index over them in memory if its varargs.
// Because we cannot tell if this is needed on the caller side, we have to
// conservatively assume that it is needed. As such, make sure we have at
// least enough stack space for the caller to store the 8 GPRs.
if (isDarwinABI)
return 8 * (LP64 ? 8 : 4);
if (isDarwinABI || isPPC64)
return 8 * (isPPC64 ? 8 : 4);

// SVR4 ABI:
// 32-bit SVR4 ABI:
// There is no default stack allocated for the 8 first GPR arguments.
return 0;
}

/// getMinCallFrameSize - Return the minimum size a call frame can be using
/// the PowerPC ABI.
static unsigned getMinCallFrameSize(bool LP64, bool isDarwinABI) {
static unsigned getMinCallFrameSize(bool isPPC64, bool isDarwinABI) {
// The call frame needs to be at least big enough for linkage and 8 args.
return getLinkageSize(LP64, isDarwinABI) +
getMinCallArgumentsSize(LP64, isDarwinABI);
return getLinkageSize(isPPC64, isDarwinABI) +
getMinCallArgumentsSize(isPPC64, isDarwinABI);
}

// With the SVR4 ABI, callee-saved registers have fixed offsets on the stack.
Expand Down Expand Up @@ -174,9 +173,113 @@ class PPCFrameInfo: public TargetFrameInfo {
std::pair<unsigned, int>(PPC::V20, -192)
};

NumEntries = array_lengthof(Offsets);
static const std::pair<unsigned, int> Offsets64[] = {
// Floating-point register save area offsets.
std::pair<unsigned, int>(PPC::F31, -8),
std::pair<unsigned, int>(PPC::F30, -16),
std::pair<unsigned, int>(PPC::F29, -24),
std::pair<unsigned, int>(PPC::F28, -32),
std::pair<unsigned, int>(PPC::F27, -40),
std::pair<unsigned, int>(PPC::F26, -48),
std::pair<unsigned, int>(PPC::F25, -56),
std::pair<unsigned, int>(PPC::F24, -64),
std::pair<unsigned, int>(PPC::F23, -72),
std::pair<unsigned, int>(PPC::F22, -80),
std::pair<unsigned, int>(PPC::F21, -88),
std::pair<unsigned, int>(PPC::F20, -96),
std::pair<unsigned, int>(PPC::F19, -104),
std::pair<unsigned, int>(PPC::F18, -112),
std::pair<unsigned, int>(PPC::F17, -120),
std::pair<unsigned, int>(PPC::F16, -128),
std::pair<unsigned, int>(PPC::F15, -136),
std::pair<unsigned, int>(PPC::F14, -144),

// General register save area offsets.
// FIXME 64-bit SVR4: Are 32-bit registers actually allocated in 64-bit
// mode?
std::pair<unsigned, int>(PPC::R31, -4),
std::pair<unsigned, int>(PPC::R30, -12),
std::pair<unsigned, int>(PPC::R29, -20),
std::pair<unsigned, int>(PPC::R28, -28),
std::pair<unsigned, int>(PPC::R27, -36),
std::pair<unsigned, int>(PPC::R26, -44),
std::pair<unsigned, int>(PPC::R25, -52),
std::pair<unsigned, int>(PPC::R24, -60),
std::pair<unsigned, int>(PPC::R23, -68),
std::pair<unsigned, int>(PPC::R22, -76),
std::pair<unsigned, int>(PPC::R21, -84),
std::pair<unsigned, int>(PPC::R20, -92),
std::pair<unsigned, int>(PPC::R19, -100),
std::pair<unsigned, int>(PPC::R18, -108),
std::pair<unsigned, int>(PPC::R17, -116),
std::pair<unsigned, int>(PPC::R16, -124),
std::pair<unsigned, int>(PPC::R15, -132),
std::pair<unsigned, int>(PPC::R14, -140),

std::pair<unsigned, int>(PPC::X31, -8),
std::pair<unsigned, int>(PPC::X30, -16),
std::pair<unsigned, int>(PPC::X29, -24),
std::pair<unsigned, int>(PPC::X28, -32),
std::pair<unsigned, int>(PPC::X27, -40),
std::pair<unsigned, int>(PPC::X26, -48),
std::pair<unsigned, int>(PPC::X25, -56),
std::pair<unsigned, int>(PPC::X24, -64),
std::pair<unsigned, int>(PPC::X23, -72),
std::pair<unsigned, int>(PPC::X22, -80),
std::pair<unsigned, int>(PPC::X21, -88),
std::pair<unsigned, int>(PPC::X20, -96),
std::pair<unsigned, int>(PPC::X19, -104),
std::pair<unsigned, int>(PPC::X18, -112),
std::pair<unsigned, int>(PPC::X17, -120),
std::pair<unsigned, int>(PPC::X16, -128),
std::pair<unsigned, int>(PPC::X15, -136),
std::pair<unsigned, int>(PPC::X14, -144),

// CR save area offset.
// FIXME SVR4: Disable CR save area for now.
// std::pair<unsigned, int>(PPC::CR2, -4),
// std::pair<unsigned, int>(PPC::CR3, -4),
// std::pair<unsigned, int>(PPC::CR4, -4),
// std::pair<unsigned, int>(PPC::CR2LT, -4),
// std::pair<unsigned, int>(PPC::CR2GT, -4),
// std::pair<unsigned, int>(PPC::CR2EQ, -4),
// std::pair<unsigned, int>(PPC::CR2UN, -4),
// std::pair<unsigned, int>(PPC::CR3LT, -4),
// std::pair<unsigned, int>(PPC::CR3GT, -4),
// std::pair<unsigned, int>(PPC::CR3EQ, -4),
// std::pair<unsigned, int>(PPC::CR3UN, -4),
// std::pair<unsigned, int>(PPC::CR4LT, -4),
// std::pair<unsigned, int>(PPC::CR4GT, -4),
// std::pair<unsigned, int>(PPC::CR4EQ, -4),
// std::pair<unsigned, int>(PPC::CR4UN, -4),

// VRSAVE save area offset.
std::pair<unsigned, int>(PPC::VRSAVE, -4),

// Vector register save area
std::pair<unsigned, int>(PPC::V31, -16),
std::pair<unsigned, int>(PPC::V30, -32),
std::pair<unsigned, int>(PPC::V29, -48),
std::pair<unsigned, int>(PPC::V28, -64),
std::pair<unsigned, int>(PPC::V27, -80),
std::pair<unsigned, int>(PPC::V26, -96),
std::pair<unsigned, int>(PPC::V25, -112),
std::pair<unsigned, int>(PPC::V24, -128),
std::pair<unsigned, int>(PPC::V23, -144),
std::pair<unsigned, int>(PPC::V22, -160),
std::pair<unsigned, int>(PPC::V21, -176),
std::pair<unsigned, int>(PPC::V20, -192)
};

return Offsets;
if (TM.getSubtarget<PPCSubtarget>().isPPC64()) {
NumEntries = array_lengthof(Offsets64);

return Offsets64;
} else {
NumEntries = array_lengthof(Offsets);

return Offsets;
}
}
};

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