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some simple optimizations for speed. this improves performance about 5%
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aquynh committed Oct 2, 2014
1 parent 16f330c commit ea3c089
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Showing 9 changed files with 18 additions and 21 deletions.
7 changes: 5 additions & 2 deletions SStream.c
Original file line number Diff line number Diff line change
Expand Up @@ -24,8 +24,11 @@ void SStream_Init(SStream *ss)
void SStream_concat0(SStream *ss, char *s)
{
#ifndef CAPSTONE_DIET
strcpy(ss->buffer + ss->index, s);
ss->index += (int) strlen(s);
unsigned int len = strlen(s);

memcpy(ss->buffer + ss->index, s, len);
ss->index += len;
ss->buffer[ss->index] = '\0';
#endif
}

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4 changes: 2 additions & 2 deletions arch/X86/X86ATTInstPrinter.c
Original file line number Diff line number Diff line change
Expand Up @@ -485,9 +485,9 @@ static void printOperand(MCInst *MI, unsigned OpNo, SStream *O)
{
MCOperand *Op = MCInst_getOperand(MI, OpNo);
if (MCOperand_isReg(Op)) {
printRegName(O, MCOperand_getReg(Op));
unsigned int reg = MCOperand_getReg(Op);
printRegName(O, reg);
if (MI->csh->detail) {
unsigned int reg = MCOperand_getReg(Op);
if (MI->csh->doing_mem) {
MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.base = reg;
} else {
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5 changes: 3 additions & 2 deletions arch/X86/X86GenAsmWriter.inc
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Expand Up @@ -14113,8 +14113,9 @@ static void printInstruction(MCInst *MI, SStream *O, MCRegisterInfo *MRI)
#endif

// Emit the opcode for the instruction.
uint64_t Bits1 = OpInfo[MCInst_getOpcode(MI)];
uint64_t Bits2 = OpInfo2[MCInst_getOpcode(MI)];
unsigned int opcode = MCInst_getOpcode(MI);
uint64_t Bits1 = OpInfo[opcode];
uint64_t Bits2 = OpInfo2[opcode];
uint64_t Bits = (Bits2 << 32) | Bits1;
// assert(Bits != 0 && "Cannot print this instruction.");
if (!X86_lockrep(MI, O))
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5 changes: 3 additions & 2 deletions arch/X86/X86GenAsmWriter1.inc
Original file line number Diff line number Diff line change
Expand Up @@ -13817,8 +13817,9 @@ static void printInstruction(MCInst *MI, SStream *O, MCRegisterInfo *MRI)
#endif

// Emit the opcode for the instruction.
uint64_t Bits1 = OpInfo[MCInst_getOpcode(MI)];
uint64_t Bits2 = OpInfo2[MCInst_getOpcode(MI)];
unsigned int opcode = MCInst_getOpcode(MI);
uint64_t Bits1 = OpInfo[opcode];
uint64_t Bits2 = OpInfo2[opcode];
uint64_t Bits = (Bits2 << 32) | Bits1;
// assert(Bits != 0 && "Cannot print this instruction.");
if (!X86_lockrep(MI, O))
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5 changes: 3 additions & 2 deletions arch/X86/X86IntelInstPrinter.c
Original file line number Diff line number Diff line change
Expand Up @@ -547,9 +547,10 @@ static void printOperand(MCInst *MI, unsigned OpNo, SStream *O)
{
MCOperand *Op = MCInst_getOperand(MI, OpNo);
if (MCOperand_isReg(Op)) {
printRegName(O, MCOperand_getReg(Op));
unsigned int reg = MCOperand_getReg(Op);

printRegName(O, reg);
if (MI->csh->detail) {
unsigned int reg = MCOperand_getReg(Op);
if (MI->csh->doing_mem) {
MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.base = reg;
} else {
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5 changes: 0 additions & 5 deletions arch/X86/X86Mapping.c
Original file line number Diff line number Diff line change
Expand Up @@ -47163,11 +47163,6 @@ static insn_map insns[] = { // reduce x86 instructions
};
#endif

// post printer for X86. put all the hacky stuff here
void X86_post_printer(csh handle, cs_insn *insn, char *insn_asm, MCInst *mci)
{
}

// given internal insn id, return public instruction info
void X86_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id)
{
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3 changes: 0 additions & 3 deletions arch/X86/X86Mapping.h
Original file line number Diff line number Diff line change
Expand Up @@ -28,9 +28,6 @@ const char *X86_insn_name(csh handle, unsigned int id);
// return group name, given group id
const char *X86_group_name(csh handle, unsigned int id);

// post printer for X86.
void X86_post_printer(csh handle, cs_insn *pub_insn, char *insn_asm, MCInst *mci);

// return register of given instruction id
// return 0 if not found
// this is to handle instructions embedding accumulate registers into AsmStrs[]
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2 changes: 1 addition & 1 deletion arch/X86/X86Module.c
Original file line number Diff line number Diff line change
Expand Up @@ -30,7 +30,7 @@ static cs_err init(cs_struct *ud)
ud->insn_id = X86_get_insn_id;
ud->insn_name = X86_insn_name;
ud->group_name = X86_group_name;
ud->post_printer = X86_post_printer;
ud->post_printer = NULL;;

if (ud->mode == CS_MODE_64)
ud->regsize_map = regsize_map_64;
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3 changes: 1 addition & 2 deletions cs.c
Original file line number Diff line number Diff line change
Expand Up @@ -260,7 +260,7 @@ static void fill_insn(struct cs_struct *handle, cs_insn *insn, char *buffer, MCI
#endif

// fill the instruction bytes
memcpy(insn->bytes, code, MIN(sizeof(insn->bytes), insn->size));
memcpy(insn->bytes, code, insn->size);

// map internal instruction opcode to public insn ID
handle->insn_id(handle, insn, MCInst_getOpcode(mci));
Expand Down Expand Up @@ -292,7 +292,6 @@ static void fill_insn(struct cs_struct *handle, cs_insn *insn, char *buffer, MCI

// copy @op_str
if (*sp) {
*sp = '\0';
// find the next non-space char
sp++;
for (; ((*sp == ' ') || (*sp == '\t')); sp++);
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