[microTVM][Zephyr] Fix PLL freq. in overlay for nucleo_l4r5zi board (a…

…pache#12756)

* [microTVM][Zephyr] Fix PLL freq. in overlay for nucleo_l4r5zi board

Commit 1d32c40 ("Add project overlay to overwrite device tree configs")
added overlay for setting 'clock-frequency' property of node 'rcc' to
120 MHz, however to effectively change the PLL frequency that drivers
the core it's necessary also to overlay the attributes for the 'pll'
node. This commit does that.

Signed-off-by: Gustavo Romero <[email protected]>

* Remove div-p and div-q properties from overlay

Remove div-p and div-q properties from the overlay file since values for
these properties will be inherited from the 'pll' that is overlaid.

Since currently microTVM does not use any subsystem which relies on
clocks associated to either P or Q params, these params can be left
unchanged for now.

Signed-off-by: Gustavo Romero <[email protected]>

apps/microtvm/zephyr/template_project/app-overlay/nucleo_l4r5zi.overlay

@@ -21,3 +21,25 @@
 &rcc {
 	clock-frequency = <DT_FREQ_M(120)>;
 };
+
+/*
+   Set PLL accordingly to freq. reported by 'clock-frequency' property, where:
+
+   VCO freq = PLL clock input freq (HSI: 16 MHz) * N / M and
+   Core freq = VCO freq / R.
+
+   Hence:
+
+   VCO freq = 16 * 30 / 2 = 240 MHz and
+   Core freq = 240 MHz / 2 = 120 MHz
+
+   Prop. 'div-p' and 'div-q' will be inherited from the overlaid 'pll' node.
+*/
+
+&pll {
+	div-m = <2>;
+	mul-n = <30>;
+	div-r = <2>;
+	clocks = <&clk_hsi>;
+	status = "okay";
+};