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drm/amdgpu: correct ih_chicken programming for vega10/vega20 ih blocks
IH_CHICKEN.MC_SPACE_FBPA_ENABLE field is only valid when IH_RB_CNTL.MC_SPACE is programed to 0x3, frame buffer physical address. For both bus address and gpu virtual address, don't program MC_SPACE_FBPA_ENABLE field Signed-off-by: Hawking Zhang <[email protected]> Acked-by: Christian König <[email protected]> Acked-by: Felix Kuehling <[email protected]> Reviewed-by: Dennis Li <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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