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drm/amdgpu: correct ih_chicken programming for vega10/vega20 ih blocks
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IH_CHICKEN.MC_SPACE_FBPA_ENABLE field is only
valid when IH_RB_CNTL.MC_SPACE is programed to 0x3,
frame buffer physical address. For both bus address
and gpu virtual address, don't program MC_SPACE_FBPA_ENABLE
field

Signed-off-by: Hawking Zhang <[email protected]>
Acked-by: Christian König <[email protected]>
Acked-by: Felix Kuehling <[email protected]>
Reviewed-by: Dennis Li <[email protected]>
Reviewed-by: Feifei Xu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Hawking Zhang authored and alexdeucher committed Dec 23, 2020
1 parent 580a6d2 commit 05bd7e7
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Showing 2 changed files with 0 additions and 6 deletions.
3 changes: 0 additions & 3 deletions drivers/gpu/drm/amd/amdgpu/vega10_ih.c
Original file line number Diff line number Diff line change
Expand Up @@ -281,9 +281,6 @@ static int vega10_ih_irq_init(struct amdgpu_device *adev)
if (adev->irq.ih.use_bus_addr) {
ih_chicken = REG_SET_FIELD(ih_chicken, IH_CHICKEN,
MC_SPACE_GPA_ENABLE, 1);
} else {
ih_chicken = REG_SET_FIELD(ih_chicken, IH_CHICKEN,
MC_SPACE_FBPA_ENABLE, 1);
}
WREG32_SOC15(OSSSYS, 0, mmIH_CHICKEN, ih_chicken);
}
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3 changes: 0 additions & 3 deletions drivers/gpu/drm/amd/amdgpu/vega20_ih.c
Original file line number Diff line number Diff line change
Expand Up @@ -312,9 +312,6 @@ static int vega20_ih_irq_init(struct amdgpu_device *adev)
if (adev->irq.ih.use_bus_addr) {
ih_chicken = REG_SET_FIELD(ih_chicken, IH_CHICKEN,
MC_SPACE_GPA_ENABLE, 1);
} else {
ih_chicken = REG_SET_FIELD(ih_chicken, IH_CHICKEN,
MC_SPACE_FBPA_ENABLE, 1);
}
WREG32_SOC15(OSSSYS, 0, mmIH_CHICKEN, ih_chicken);
}
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